10 bool ps2_channel1_okay =
false;
11 bool ps2_channel2_okay =
false;
13 uint8_t ps2_read_configuration_byte() {
14 ps2_in_wait_until_empty();
15 outb(PS2_STATE_REG, 0x20);
20 void ps2_write_configuration_byte(uint8_t
byte) {
21 ps2_in_wait_until_empty();
22 outb(PS2_STATE_REG, 0x60);
27 void ps2_in_wait_until_empty() {
28 while(inb(PS2_STATE_REG) & (1 << 1));
31 void ps2_out_wait_until_full() {
32 while(!(inb(PS2_STATE_REG) & 1));
36 ps2_out_wait_until_full();
37 return inb(PS2_DATA_PORT);
40 void ps2_write(uint8_t
byte) {
41 ps2_in_wait_until_empty();
42 outb(PS2_DATA_PORT,
byte);
45 void ps2_disable_first_device() {
46 ps2_in_wait_until_empty();
47 outb(PS2_STATE_REG, 0xAD);
50 void ps2_disable_second_device() {
51 ps2_in_wait_until_empty();
52 outb(PS2_STATE_REG, 0xA7);
55 void ps2_enable_first_device() {
56 ps2_in_wait_until_empty();
57 outb(PS2_STATE_REG, 0xAE);
60 void ps2_enable_second_device() {
61 ps2_in_wait_until_empty();
62 outb(PS2_STATE_REG, 0xA8);
66 while(inb(PS2_STATE_REG) & 1) {
73 ps2_in_wait_until_empty();
75 outb(PS2_STATE_REG, 0xAA);
77 ps2_out_wait_until_full();
79 uint8_t reply = inb(PS2_DATA_PORT);
86 ps2_disable_first_device();
87 ps2_disable_second_device();
91 ps2_in_wait_until_empty();
93 uint8_t conf = ps2_read_configuration_byte();
94 ps2_write_configuration_byte(conf & ~(0b1000011));
98 bool test_ok = ps2_test();
101 qemu_ok(
"PS/2 test ok!");
103 qemu_ok(
"PS/2 TEST ERROR!");
109 ps2_in_wait_until_empty();
110 outb(PS2_STATE_REG, 0xAB);
112 ps2_out_wait_until_full();
113 uint8_t result = inb(PS2_DATA_PORT);
116 qemu_ok(
"Passed test for channel 1!");
117 ps2_channel1_okay =
true;
119 qemu_err(
"Channel 1: Test failed! Result: %x", result);
124 ps2_in_wait_until_empty();
125 outb(PS2_STATE_REG, 0xA9);
127 ps2_out_wait_until_full();
128 result = inb(PS2_DATA_PORT);
131 qemu_ok(
"Passed test for channel 2!");
132 ps2_channel2_okay =
true;
134 qemu_err(
"Channel 2: Test failed! Result: %x", result);
137 ps2_enable_first_device();
138 ps2_enable_second_device();