12 #include "sys/cpu_isr.h"
14 volatile isr_t interrupt_handlers[256];
17 if (interrupt_handlers[regs.int_num] != 0){
18 isr_t handler = interrupt_handlers[regs.int_num];
24 if (regs.int_num >= 40){
30 if (interrupt_handlers[regs.int_num] != 0){
31 isr_t handler = interrupt_handlers[regs.int_num];
38 void register_interrupt_handler(uint8_t n, isr_t handler){
39 qemu_warn(
"Updated handler for IRQ%d", n);
41 interrupt_handlers[n] = handler;
46 register_interrupt_handler(INT_0, &division_by_zero);
47 register_interrupt_handler(INT_6, &fault_opcode);
48 register_interrupt_handler(INT_8, &double_error);
49 register_interrupt_handler(INT_10, &invalid_tss);
50 register_interrupt_handler(INT_11, &segment_is_not_available);
51 register_interrupt_handler(INT_12, &stack_error);
52 register_interrupt_handler(INT_13, &general_protection_error);
53 register_interrupt_handler(INT_14, &page_fault);
54 register_interrupt_handler(INT_16, &fpu_fault);