/**
 * @file
 *
 * @date Mar 23, 2020
 * @author Anton Bondarev
 */

#ifndef SRC_DRIVERS_INTERRUPT_MIPS_GIC_MIPS_GIC_H_
#define SRC_DRIVERS_INTERRUPT_MIPS_GIC_MIPS_GIC_H_

#define __IRQCTRL_IRQS_TOTAL 192

#endif /* SRC_DRIVERS_INTERRUPT_MIPS_GIC_MIPS_GIC_H_ */
