| LibDriver LLCC68 1.0.0 LLCC68 full function driver

driver_llcc68.h
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1
37 #ifndef DRIVER_LLCC68_H
38 #define DRIVER_LLCC68_H
39
40 #include <stdio.h>
41 #include <stdint.h>
42 #include <string.h>
43
44 #ifdef __cplusplus
45 extern "C"{
46 #endif
47
62 typedef enum
63 {
64 LLCC68_BOOL_FALSE = 0x00,
65 LLCC68_BOOL_TRUE = 0x01,
66 } llcc68_bool_t;
67
71 typedef enum
72 {
73 LLCC68_START_MODE_COLD = 0x00,
74 LLCC68_START_MODE_WARM = 0x01,
75 } llcc68_start_mode_t;
76
80 typedef enum
81 {
82 LLCC68_CLOCK_SOURCE_RC_13M = 0x00,
83 LLCC68_CLOCK_SOURCE_XTAL_32MHZ = 0x01,
84 } llcc68_clock_source_t;
85
89 typedef enum
90 {
91 LLCC68_REGULATOR_MODE_ONLY_LDO = 0x00,
92 LLCC68_REGULATOR_MODE_DC_DC_LDO = 0x01,
93 } llcc68_regulator_mode_t;
94
98 typedef enum
99 {
100 LLCC68_CALIBRATION_RC64K = (1 << 0),
101 LLCC68_CALIBRATION_RC13M = (1 << 1),
102 LLCC68_CALIBRATION_PLL = (1 << 2),
103 LLCC68_CALIBRATION_ADC_PULSE = (1 << 3),
104 LLCC68_CALIBRATION_ADC_BULK_N = (1 << 4),
105 LLCC68_CALIBRATION_ADC_BULK_P = (1 << 5),
106 LLCC68_CALIBRATION_IMAGE = (1 << 6),
107 } llcc68_calibration_t;
108
112 typedef enum
113 {
114 LLCC68_IRQ_TX_DONE = (1 << 0),
115 LLCC68_IRQ_RX_DONE = (1 << 1),
116 LLCC68_IRQ_PREAMBLE_DETECTED = (1 << 2),
117 LLCC68_IRQ_SYNC_WORD_VALID = (1 << 3),
118 LLCC68_IRQ_HEADER_VALID = (1 << 4),
119 LLCC68_IRQ_HEADER_ERR = (1 << 5),
120 LLCC68_IRQ_CRC_ERR = (1 << 6),
121 LLCC68_IRQ_CAD_DONE = (1 << 7),
122 LLCC68_IRQ_CAD_DETECTED = (1 << 8),
123 LLCC68_IRQ_TIMEOUT = (1 << 9),
124 } llcc68_irq_t;
125
129 typedef enum
130 {
131 LLCC68_RX_TX_FALLBACK_MODE_FS = 0x40,
132 LLCC68_RX_TX_FALLBACK_MODE_STDBY_XOSC = 0x30,
133 LLCC68_RX_TX_FALLBACK_MODE_STDBY_RC = 0x20,
134 } llcc68_rx_tx_fallback_mode_t;
135
139 typedef enum
140 {
141 LLCC68_TCXO_VOLTAGE_1P6V = 0x00,
142 LLCC68_TCXO_VOLTAGE_1P7V = 0x01,
143 LLCC68_TCXO_VOLTAGE_1P8V = 0x02,
144 LLCC68_TCXO_VOLTAGE_2P2V = 0x03,
145 LLCC68_TCXO_VOLTAGE_2P4V = 0x04,
146 LLCC68_TCXO_VOLTAGE_2P7V = 0x05,
147 LLCC68_TCXO_VOLTAGE_3P0V = 0x06,
148 LLCC68_TCXO_VOLTAGE_3P3V = 0x07,
149 } llcc68_tcxo_voltage_t;
150
154 typedef enum
155 {
156 LLCC68_PACKET_TYPE_GFSK = 0x00,
157 LLCC68_PACKET_TYPE_LORA = 0x01,
158 } llcc68_packet_type_t;
159
163 typedef enum
164 {
165 LLCC68_RAMP_TIME_10US = 0x00,
166 LLCC68_RAMP_TIME_20US = 0x01,
167 LLCC68_RAMP_TIME_40US = 0x02,
168 LLCC68_RAMP_TIME_80US = 0x03,
169 LLCC68_RAMP_TIME_200US = 0x04,
170 LLCC68_RAMP_TIME_800US = 0x05,
171 LLCC68_RAMP_TIME_1700US = 0x06,
172 LLCC68_RAMP_TIME_3400US = 0x07,
173 } llcc68_ramp_time_t;
174
178 typedef enum
179 {
180 LLCC68_GFSK_PULSE_SHAPE_NO_FILTER = 0x00,
181 LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P3 = 0x08,
182 LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P5 = 0x09,
183 LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P7 = 0x0A,
184 LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_1 = 0x0B,
185 } llcc68_gfsk_pulse_shape_t;
186
190 typedef enum
191 {
192 LLCC68_GFSK_BANDWIDTH_4P8_KHZ = 0x1F,
193 LLCC68_GFSK_BANDWIDTH_5P8_KHZ = 0x17,
194 LLCC68_GFSK_BANDWIDTH_7P3_KHZ = 0x0F,
195 LLCC68_GFSK_BANDWIDTH_9P7_KHZ = 0x1E,
196 LLCC68_GFSK_BANDWIDTH_11P7_KHZ = 0x16,
197 LLCC68_GFSK_BANDWIDTH_14P6_KHZ = 0x0E,
198 LLCC68_GFSK_BANDWIDTH_19P5_KHZ = 0x1D,
199 LLCC68_GFSK_BANDWIDTH_23P4_KHZ = 0x15,
200 LLCC68_GFSK_BANDWIDTH_29P3_KHZ = 0x0D,
201 LLCC68_GFSK_BANDWIDTH_39_KHZ = 0x1C,
202 LLCC68_GFSK_BANDWIDTH_46P9_KHZ = 0x14,
203 LLCC68_GFSK_BANDWIDTH_58P6_KHZ = 0x0C,
204 LLCC68_GFSK_BANDWIDTH_78P2_KHZ = 0x1B,
205 LLCC68_GFSK_BANDWIDTH_93P8_KHZ = 0x13,
206 LLCC68_GFSK_BANDWIDTH_117P3_KHZ = 0x0B,
207 LLCC68_GFSK_BANDWIDTH_156P2_KHZ = 0x1A,
208 LLCC68_GFSK_BANDWIDTH_187P2_KHZ = 0x12,
209 LLCC68_GFSK_BANDWIDTH_232P3_KHZ = 0x0A,
210 LLCC68_GFSK_BANDWIDTH_312_KHZ = 0x19,
211 LLCC68_GFSK_BANDWIDTH_373P6_KHZ = 0x11,
212 LLCC68_GFSK_BANDWIDTH_467_KHZ = 0x09,
213 } llcc68_gfsk_bandwidth_t;
214
218 typedef enum
219 {
220 LLCC68_LORA_SF_5 = 0x05,
221 LLCC68_LORA_SF_6 = 0x06,
222 LLCC68_LORA_SF_7 = 0x07,
223 LLCC68_LORA_SF_8 = 0x08,
224 LLCC68_LORA_SF_9 = 0x09,
225 LLCC68_LORA_SF_10 = 0x0A,
226 LLCC68_LORA_SF_11 = 0x0B,
227 } llcc68_lora_sf_t;
228
232 typedef enum
233 {
234 LLCC68_LORA_BANDWIDTH_125_KHZ = 0x04,
235 LLCC68_LORA_BANDWIDTH_250_KHZ = 0x05,
236 LLCC68_LORA_BANDWIDTH_500_KHZ = 0x06,
237 } llcc68_lora_bandwidth_t;
238
242 typedef enum
243 {
244 LLCC68_LORA_CR_4_5 = 0x01,
245 LLCC68_LORA_CR_4_6 = 0x02,
246 LLCC68_LORA_CR_4_7 = 0x03,
247 LLCC68_LORA_CR_4_8 = 0x04,
248 } llcc68_lora_cr_t;
249
253 typedef enum
254 {
255 LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_OFF = 0x00,
256 LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_8_BITS = 0x04,
257 LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_16_BITS = 0x05,
258 LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_24_BITS = 0x06,
259 LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_32_BITS = 0x07,
260 } llcc68_gfsk_preamble_detector_length_t;
261
265 typedef enum
266 {
267 LLCC68_GFSK_ADDR_FILTER_DISABLE = 0x00,
268 LLCC68_GFSK_ADDR_FILTER_ACTIVATED_NODE_ADDR = 0x01,
269 LLCC68_GFSK_ADDR_FILTER_ACTIVATED_NODE_BROADCAST_ADDR = 0x02,
270 } llcc68_gfsk_addr_filter_t;
271
275 typedef enum
276 {
277 LLCC68_GFSK_PACKET_TYPE_KNOWN_LENGTH = 0x00,
279 LLCC68_GFSK_PACKET_TYPE_VARIABLE_SIZE = 0x01,
281 } llcc68_gfsk_packet_type_t;
282
286 typedef enum
287 {
288 LLCC68_GFSK_CRC_TYPE_OFF = 0x01,
289 LLCC68_GFSK_CRC_TYPE_1_BYTE = 0x00,
290 LLCC68_GFSK_CRC_TYPE_2_BYTE = 0x02,
291 LLCC68_GFSK_CRC_TYPE_1_BYTE_INV = 0x04,
292 LLCC68_GFSK_CRC_TYPE_2_BYTE_INV = 0x06,
293 } llcc68_gfsk_crc_type_t;
294
298 typedef enum
299 {
300 LLCC68_LORA_HEADER_EXPLICIT = 0x00,
301 LLCC68_LORA_HEADER_IMPLICIT = 0x01,
302 } llcc68_lora_header_t;
303
307 typedef enum
308 {
309 LLCC68_LORA_CRC_TYPE_OFF = 0x00,
310 LLCC68_LORA_CRC_TYPE_ON = 0x01,
311 } llcc68_lora_crc_type_t;
312
316 typedef enum
317 {
318 LLCC68_LORA_CAD_SYMBOL_NUM_1 = 0x00,
319 LLCC68_LORA_CAD_SYMBOL_NUM_2 = 0x01,
320 LLCC68_LORA_CAD_SYMBOL_NUM_4 = 0x02,
321 LLCC68_LORA_CAD_SYMBOL_NUM_8 = 0x03,
322 LLCC68_LORA_CAD_SYMBOL_NUM_16 = 0x04,
323 } llcc68_lora_cad_symbol_num_t;
324
328 typedef enum
329 {
330 LLCC68_LORA_CAD_EXIT_MODE_ONLY = 0x00,
332 LLCC68_LORA_CAD_EXIT_MODE_RX = 0x01,
335 } llcc68_lora_cad_exit_mode_t;
336
340 typedef enum
341 {
342 LLCC68_FSK_RX_STATUS_PREAMBLE_ERR = (1 << 7),
343 LLCC68_FSK_RX_STATUS_SYNC_ERR = (1 << 6),
344 LLCC68_FSK_RX_STATUS_ADDR_ERR = (1 << 5),
345 LLCC68_FSK_RX_STATUS_CRC_ERR = (1 << 4),
346 LLCC68_FSK_RX_STATUS_LENGTH_ERR = (1 << 3),
347 LLCC68_FSK_RX_STATUS_ABORT_ERR = (1 << 2),
348 LLCC68_FSK_RX_STATUS_PKT_RECEIVED = (1 << 1),
349 LLCC68_FSK_RX_STATUS_PKT_SEND = (1 << 0),
350 } llcc68_fsk_rx_status_t;
351
355 typedef enum
356 {
357 LLCC68_OP_ERROR_PA_RAMP_ERR = (1 << 8),
358 LLCC68_OP_ERROR_PLL_LOCK_ERR = (1 << 6),
359 LLCC68_OP_ERROR_XOSC_START_ERR = (1 << 5),
360 LLCC68_OP_ERROR_IMG_CALIB_ERR = (1 << 4),
361 LLCC68_OP_ERROR_ADC_CALIB_ERR = (1 << 3),
362 LLCC68_OP_ERROR_PLL_CALIB_ERR = (1 << 2),
363 LLCC68_OP_ERROR_RC13M_CALIB_ERR = (1 << 1),
364 LLCC68_OP_ERROR_RC64K_CALIB_ERR = (1 << 0),
365 } llcc68_op_error_t;
366
370 typedef struct llcc68_handle_s
371 {
372 uint8_t (*reset_gpio_init)(void);
373 uint8_t (*reset_gpio_deinit)(void);
374 uint8_t (*reset_gpio_write)(uint8_t value);
375 uint8_t (*busy_gpio_init)(void);
376 uint8_t (*busy_gpio_deinit)(void);
377 uint8_t (*busy_gpio_read)(uint8_t *value);
378 uint8_t (*spi_init)(void);
379 uint8_t (*spi_deinit)(void);
380 uint8_t (*spi_write_read)(uint8_t *in_buf, uint32_t in_len,
381 uint8_t *out_buf, uint32_t out_len);
382 void (*delay_ms)(uint32_t ms);
383 void (*debug_print)(const char *const fmt, ...);
384 void (*receive_callback)(uint16_t type,
385 uint8_t *buf, uint16_t len);
386 uint8_t inited;
387 uint8_t tx_done;
388 uint8_t cad_done;
389 uint8_t cad_detected;
390 uint8_t crc_error;
391 uint8_t timeout;
392 uint8_t buf[384];
393 uint8_t receive_buf[256];
394 } llcc68_handle_t;
395
399 typedef struct llcc68_info_s
400 {
401 char chip_name[32];
402 char manufacturer_name[32];
403 char interface[8];
404 float supply_voltage_min_v;
405 float supply_voltage_max_v;
406 float max_current_ma;
407 float temperature_min;
408 float temperature_max;
409 uint32_t driver_version;
410 } llcc68_info_t;
411
429 #define DRIVER_LLCC68_LINK_INIT(HANDLE, STRUCTURE) memset(HANDLE, 0, sizeof(STRUCTURE))
430
437 #define DRIVER_LLCC68_LINK_SPI_INIT(HANDLE, FUC) (HANDLE)->spi_init = FUC
438
445 #define DRIVER_LLCC68_LINK_SPI_DEINIT(HANDLE, FUC) (HANDLE)->spi_deinit = FUC
446
453 #define DRIVER_LLCC68_LINK_SPI_WRITE_READ(HANDLE, FUC) (HANDLE)->spi_write_read = FUC
454
461 #define DRIVER_LLCC68_LINK_RESET_GPIO_INIT(HANDLE, FUC) (HANDLE)->reset_gpio_init = FUC
462
469 #define DRIVER_LLCC68_LINK_RESET_GPIO_DEINIT(HANDLE, FUC) (HANDLE)->reset_gpio_deinit = FUC
470
477 #define DRIVER_LLCC68_LINK_RESET_GPIO_WRITE(HANDLE, FUC) (HANDLE)->reset_gpio_write = FUC
478
485 #define DRIVER_LLCC68_LINK_BUSY_GPIO_INIT(HANDLE, FUC) (HANDLE)->busy_gpio_init = FUC
486
493 #define DRIVER_LLCC68_LINK_BUSY_GPIO_DEINIT(HANDLE, FUC) (HANDLE)->busy_gpio_deinit = FUC
494
501 #define DRIVER_LLCC68_LINK_BUSY_GPIO_READ(HANDLE, FUC) (HANDLE)->busy_gpio_read = FUC
502
509 #define DRIVER_LLCC68_LINK_DELAY_MS(HANDLE, FUC) (HANDLE)->delay_ms = FUC
510
517 #define DRIVER_LLCC68_LINK_DEBUG_PRINT(HANDLE, FUC) (HANDLE)->debug_print = FUC
518
525 #define DRIVER_LLCC68_LINK_RECEIVE_CALLBACK(HANDLE, FUC) (HANDLE)->receive_callback = FUC
526
546 uint8_t llcc68_info(llcc68_info_t *info);
547
558 uint8_t llcc68_irq_handler(llcc68_handle_t *handle);
559
573 uint8_t llcc68_init(llcc68_handle_t *handle);
574
589 uint8_t llcc68_deinit(llcc68_handle_t *handle);
590
613 uint8_t llcc68_lora_transmit(llcc68_handle_t *handle, llcc68_clock_source_t standby_src,
614 uint16_t preamble_length, llcc68_lora_header_t header_type,
615 llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable,
616 uint8_t *buf, uint16_t len, uint32_t us);
617
631 uint8_t llcc68_lora_cad(llcc68_handle_t *handle, llcc68_bool_t *enable);
632
645 uint8_t llcc68_single_receive(llcc68_handle_t *handle, double us);
646
658 uint8_t llcc68_continuous_receive(llcc68_handle_t *handle);
659
674 uint8_t llcc68_write_register(llcc68_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len);
675
690 uint8_t llcc68_read_register(llcc68_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len);
691
706 uint8_t llcc68_write_buffer(llcc68_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len);
707
722 uint8_t llcc68_read_buffer(llcc68_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len);
723
734 uint8_t llcc68_check_packet_error(llcc68_handle_t *handle, llcc68_bool_t *enable);
735
749 uint8_t llcc68_set_sleep(llcc68_handle_t *handle, llcc68_start_mode_t mode, llcc68_bool_t rtc_wake_up_enable);
750
763 uint8_t llcc68_set_standby(llcc68_handle_t *handle, llcc68_clock_source_t src);
764
776 uint8_t llcc68_set_frequency_synthesis(llcc68_handle_t *handle);
777
790 uint8_t llcc68_set_tx(llcc68_handle_t *handle, uint32_t timeout);
791
805 uint8_t llcc68_set_rx(llcc68_handle_t *handle, uint32_t timeout);
806
818 uint8_t llcc68_timeout_convert_to_register(llcc68_handle_t *handle, double us, uint32_t *reg);
819
831 uint8_t llcc68_timeout_convert_to_data(llcc68_handle_t *handle, uint32_t reg, double *us);
832
845 uint8_t llcc68_set_stop_timer_on_preamble(llcc68_handle_t *handle, llcc68_bool_t enable);
846
860 uint8_t llcc68_set_rx_duty_cycle(llcc68_handle_t *handle, uint32_t rx_period, uint32_t sleep_period);
861
873 uint8_t llcc68_set_cad(llcc68_handle_t *handle);
874
886 uint8_t llcc68_set_tx_continuous_wave(llcc68_handle_t *handle);
887
899 uint8_t llcc68_set_tx_infinite_preamble(llcc68_handle_t *handle);
900
913 uint8_t llcc68_set_regulator_mode(llcc68_handle_t *handle, llcc68_regulator_mode_t mode);
914
927 uint8_t llcc68_set_calibration(llcc68_handle_t *handle, uint8_t settings);
928
942 uint8_t llcc68_set_calibration_image(llcc68_handle_t *handle, uint8_t freq1, uint8_t freq2);
943
957 uint8_t llcc68_set_pa_config(llcc68_handle_t *handle, uint8_t pa_duty_cycle, uint8_t hp_max);
958
971 uint8_t llcc68_set_rx_tx_fallback_mode(llcc68_handle_t *handle, llcc68_rx_tx_fallback_mode_t mode);
972
988 uint8_t llcc68_set_dio_irq_params(llcc68_handle_t *handle, uint16_t irq_mask, uint16_t dio1_mask,
989 uint16_t dio2_mask, uint16_t dio3_mask);
990
1003 uint8_t llcc68_get_irq_status(llcc68_handle_t *handle, uint16_t *status);
1004
1017 uint8_t llcc68_clear_irq_status(llcc68_handle_t *handle, uint16_t clear_irq_param);
1018
1031 uint8_t llcc68_set_dio2_as_rf_switch_ctrl(llcc68_handle_t *handle, llcc68_bool_t enable);
1032
1046 uint8_t llcc68_set_dio3_as_tcxo_ctrl(llcc68_handle_t *handle, llcc68_tcxo_voltage_t voltage, uint32_t delay);
1047
1059 uint8_t llcc68_frequency_convert_to_register(llcc68_handle_t *handle, uint32_t freq, uint32_t *reg);
1060
1072 uint8_t llcc68_frequency_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *freq);
1073
1086 uint8_t llcc68_set_rf_frequency(llcc68_handle_t *handle, uint32_t reg);
1087
1100 uint8_t llcc68_set_packet_type(llcc68_handle_t *handle, llcc68_packet_type_t type);
1101
1114 uint8_t llcc68_get_packet_type(llcc68_handle_t *handle, llcc68_packet_type_t *type);
1115
1129 uint8_t llcc68_set_tx_params(llcc68_handle_t *handle, int8_t dbm, llcc68_ramp_time_t t);
1130
1146 uint8_t llcc68_set_gfsk_modulation_params(llcc68_handle_t *handle, uint32_t br, llcc68_gfsk_pulse_shape_t shape,
1147 llcc68_gfsk_bandwidth_t bw, uint32_t fdev);
1148
1160 uint8_t llcc68_gfsk_bit_rate_convert_to_register(llcc68_handle_t *handle, uint32_t br, uint32_t *reg);
1161
1173 uint8_t llcc68_gfsk_bit_rate_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *br);
1174
1186 uint8_t llcc68_gfsk_frequency_deviation_convert_to_register(llcc68_handle_t *handle, uint32_t freq, uint32_t *reg);
1187
1199 uint8_t llcc68_gfsk_frequency_deviation_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *freq);
1200
1216 uint8_t llcc68_set_lora_modulation_params(llcc68_handle_t *handle, llcc68_lora_sf_t sf, llcc68_lora_bandwidth_t bw,
1217 llcc68_lora_cr_t cr, llcc68_bool_t low_data_rate_optimize_enable);
1218
1239 uint8_t llcc68_set_gfsk_packet_params(llcc68_handle_t *handle, uint16_t preamble_length,
1240 llcc68_gfsk_preamble_detector_length_t detector_length,
1241 uint8_t sync_word_length, llcc68_gfsk_addr_filter_t filter,
1242 llcc68_gfsk_packet_type_t packet_type, uint8_t payload_length,
1243 llcc68_gfsk_crc_type_t crc_type, llcc68_bool_t whitening_enable);
1244
1261 uint8_t llcc68_set_lora_packet_params(llcc68_handle_t *handle, uint16_t preamble_length,
1262 llcc68_lora_header_t header_type, uint8_t payload_length,
1263 llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable);
1264
1281 uint8_t llcc68_set_cad_params(llcc68_handle_t *handle, llcc68_lora_cad_symbol_num_t num,
1282 uint8_t cad_det_peak, uint8_t cad_det_min, llcc68_lora_cad_exit_mode_t mode,
1283 uint32_t timeout);
1284
1298 uint8_t llcc68_set_buffer_base_address(llcc68_handle_t *handle, uint8_t tx_base_addr, uint8_t rx_base_addr);
1299
1312 uint8_t llcc68_set_lora_symb_num_timeout(llcc68_handle_t *handle, uint8_t symb_num);
1313
1326 uint8_t llcc68_get_status(llcc68_handle_t *handle, uint8_t *status);
1327
1341 uint8_t llcc68_get_rx_buffer_status(llcc68_handle_t *handle, uint8_t *payload_length_rx, uint8_t *rx_start_buffer_pointer);
1342
1359 uint8_t llcc68_get_gfsk_packet_status(llcc68_handle_t *handle, uint8_t *rx_status, uint8_t *rssi_sync_raw,
1360 uint8_t *rssi_avg_raw, float *rssi_sync, float *rssi_avg);
1361
1379 uint8_t llcc68_get_lora_packet_status(llcc68_handle_t *handle, uint8_t *rssi_pkt_raw, uint8_t *snr_pkt_raw,
1380 uint8_t *signal_rssi_pkt_raw, float *rssi_pkt, float *snr_pkt, float *signal_rssi_pkt);
1381
1395 uint8_t llcc68_get_instantaneous_rssi(llcc68_handle_t *handle, uint8_t *rssi_inst_raw, float *rssi_inst);
1396
1411 uint8_t llcc68_get_stats(llcc68_handle_t *handle, uint16_t *pkt_received, uint16_t *pkt_crc_error, uint16_t *pkt_length_header_error);
1412
1427 uint8_t llcc68_reset_stats(llcc68_handle_t *handle, uint16_t pkt_received, uint16_t pkt_crc_error, uint16_t pkt_length_header_error);
1428
1441 uint8_t llcc68_get_device_errors(llcc68_handle_t *handle, uint16_t *op_error);
1442
1454 uint8_t llcc68_clear_device_errors(llcc68_handle_t *handle);
1455
1479 uint8_t llcc68_set_fsk_whitening_initial_value(llcc68_handle_t *handle, uint16_t value);
1480
1493 uint8_t llcc68_get_fsk_whitening_initial_value(llcc68_handle_t *handle, uint16_t *value);
1494
1507 uint8_t llcc68_set_fsk_crc_initical_value(llcc68_handle_t *handle, uint16_t value);
1508
1521 uint8_t llcc68_get_fsk_crc_initical_value(llcc68_handle_t *handle, uint16_t *value);
1522
1535 uint8_t llcc68_set_fsk_crc_polynomial_value(llcc68_handle_t *handle, uint16_t value);
1536
1549 uint8_t llcc68_get_fsk_crc_polynomial_value(llcc68_handle_t *handle, uint16_t *value);
1550
1563 uint8_t llcc68_set_fsk_sync_word(llcc68_handle_t *handle, uint8_t sync_word[8]);
1564
1577 uint8_t llcc68_get_fsk_sync_word(llcc68_handle_t *handle, uint8_t sync_word[8]);
1578
1591 uint8_t llcc68_set_fsk_node_address(llcc68_handle_t *handle, uint8_t addr);
1592
1605 uint8_t llcc68_get_fsk_node_address(llcc68_handle_t *handle, uint8_t *addr);
1606
1619 uint8_t llcc68_set_fsk_broadcast_address(llcc68_handle_t *handle, uint8_t addr);
1620
1633 uint8_t llcc68_get_fsk_broadcast_address(llcc68_handle_t *handle, uint8_t *addr);
1634
1647 uint8_t llcc68_set_iq_polarity(llcc68_handle_t *handle, uint8_t setup);
1648
1661 uint8_t llcc68_get_iq_polarity(llcc68_handle_t *handle, uint8_t *setup);
1662
1675 uint8_t llcc68_set_lora_sync_word(llcc68_handle_t *handle, uint16_t sync_word);
1676
1689 uint8_t llcc68_get_lora_sync_word(llcc68_handle_t *handle, uint16_t *sync_word);
1690
1703 uint8_t llcc68_get_random_number(llcc68_handle_t *handle, uint32_t *r);
1704
1717 uint8_t llcc68_set_tx_modulation(llcc68_handle_t *handle, uint8_t modulation);
1718
1731 uint8_t llcc68_get_tx_modulation(llcc68_handle_t *handle, uint8_t *modulation);
1732
1745 uint8_t llcc68_set_rx_gain(llcc68_handle_t *handle, uint8_t gain);
1746
1759 uint8_t llcc68_get_rx_gain(llcc68_handle_t *handle, uint8_t *gain);
1760
1773 uint8_t llcc68_set_tx_clamp_config(llcc68_handle_t *handle, uint8_t config);
1774
1787 uint8_t llcc68_get_tx_clamp_config(llcc68_handle_t *handle, uint8_t *config);
1788
1801 uint8_t llcc68_set_ocp(llcc68_handle_t *handle, uint8_t ocp);
1802
1815 uint8_t llcc68_get_ocp(llcc68_handle_t *handle, uint8_t *ocp);
1816
1829 uint8_t llcc68_set_rtc_control(llcc68_handle_t *handle, uint8_t control);
1830
1843 uint8_t llcc68_get_rtc_control(llcc68_handle_t *handle, uint8_t *control);
1844
1857 uint8_t llcc68_set_xta_trim(llcc68_handle_t *handle, uint8_t trim);
1858
1871 uint8_t llcc68_get_xta_trim(llcc68_handle_t *handle, uint8_t *trim);
1872
1885 uint8_t llcc68_set_xtb_trim(llcc68_handle_t *handle, uint8_t trim);
1886
1899 uint8_t llcc68_get_xtb_trim(llcc68_handle_t *handle, uint8_t *trim);
1900
1913 uint8_t llcc68_set_dio3_output_control(llcc68_handle_t *handle, uint8_t control);
1914
1927 uint8_t llcc68_get_dio3_output_control(llcc68_handle_t *handle, uint8_t *control);
1928
1941 uint8_t llcc68_set_event_mask(llcc68_handle_t *handle, uint8_t mask);
1942
1955 uint8_t llcc68_get_event_mask(llcc68_handle_t *handle, uint8_t *mask);
1956
1969 uint8_t llcc68_set_dio_output_enable(llcc68_handle_t *handle, uint8_t enable);
1970
1983 uint8_t llcc68_get_dio_output_enable(llcc68_handle_t *handle, uint8_t *enable);
1984
1997 uint8_t llcc68_set_dio_input_enable(llcc68_handle_t *handle, uint8_t enable);
1998
2011 uint8_t llcc68_get_dio_input_enable(llcc68_handle_t *handle, uint8_t *enable);
2012
2025 uint8_t llcc68_set_pull_up_control(llcc68_handle_t *handle, uint8_t control);
2026
2039 uint8_t llcc68_get_pull_up_control(llcc68_handle_t *handle, uint8_t *control);
2040
2053 uint8_t llcc68_set_pull_down_control(llcc68_handle_t *handle, uint8_t control);
2054
2067 uint8_t llcc68_get_pull_down_control(llcc68_handle_t *handle, uint8_t *control);
2068
2094 uint8_t llcc68_write_read_reg(llcc68_handle_t *handle, uint8_t *in_buf, uint32_t in_len,
2095 uint8_t *out_buf, uint32_t out_len);
2096
2105 #ifdef __cplusplus
2106 }
2107 #endif
2108
2109 #endif
llcc68_lora_crc_type_t
llcc68_lora_crc_type_t
llcc68 lora crc type enumeration definition
Definition: driver_llcc68.h:308
llcc68_irq_handler
uint8_t llcc68_irq_handler(llcc68_handle_t *handle)
irq handler
Definition: driver_llcc68.c:400
llcc68_lora_bandwidth_t
llcc68_lora_bandwidth_t
llcc68 lora bandwidth enumeration definition
Definition: driver_llcc68.h:233
llcc68_bool_t
llcc68_bool_t
llcc68 bool enumeration definition
Definition: driver_llcc68.h:63
llcc68_gfsk_packet_type_t
llcc68_gfsk_packet_type_t
llcc68 gfsk packet type enumeration definition
Definition: driver_llcc68.h:276
llcc68_clock_source_t
llcc68_clock_source_t
llcc68 clock source enumeration definition
Definition: driver_llcc68.h:81
llcc68_set_rf_frequency
uint8_t llcc68_set_rf_frequency(llcc68_handle_t *handle, uint32_t reg)
set the rf frequency
Definition: driver_llcc68.c:2531
llcc68_set_lora_modulation_params
uint8_t llcc68_set_lora_modulation_params(llcc68_handle_t *handle, llcc68_lora_sf_t sf, llcc68_lora_bandwidth_t bw, llcc68_lora_cr_t cr, llcc68_bool_t low_data_rate_optimize_enable)
set the modulation params in LoRa mode
Definition: driver_llcc68.c:2888
llcc68_info
uint8_t llcc68_info(llcc68_info_t *info)
get chip's information
Definition: driver_llcc68.c:5617
llcc68_set_pa_config
uint8_t llcc68_set_pa_config(llcc68_handle_t *handle, uint8_t pa_duty_cycle, uint8_t hp_max)
set the pa config
Definition: driver_llcc68.c:2135
llcc68_check_packet_error
uint8_t llcc68_check_packet_error(llcc68_handle_t *handle, llcc68_bool_t *enable)
check the packet error
Definition: driver_llcc68.c:1046
llcc68_lora_sf_t
llcc68_lora_sf_t
llcc68 lora spreading factor enumeration definition
Definition: driver_llcc68.h:219
llcc68_clear_device_errors
uint8_t llcc68_clear_device_errors(llcc68_handle_t *handle)
clear the device errors
Definition: driver_llcc68.c:3622
llcc68_irq_t
llcc68_irq_t
llcc68 irq enumeration definition
Definition: driver_llcc68.h:113
llcc68_gfsk_crc_type_t
llcc68_gfsk_crc_type_t
llcc68 gfsk crc type enumeration definition
Definition: driver_llcc68.h:287
llcc68_lora_transmit
uint8_t llcc68_lora_transmit(llcc68_handle_t *handle, llcc68_clock_source_t standby_src, uint16_t preamble_length, llcc68_lora_header_t header_type, llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable, uint8_t *buf, uint16_t len, uint32_t us)
send the lora data
Definition: driver_llcc68.c:1084
llcc68_get_lora_packet_status
uint8_t llcc68_get_lora_packet_status(llcc68_handle_t *handle, uint8_t *rssi_pkt_raw, uint8_t *snr_pkt_raw, uint8_t *signal_rssi_pkt_raw, float *rssi_pkt, float *snr_pkt, float *signal_rssi_pkt)
get the packet status in LoRa mode
Definition: driver_llcc68.c:3374
llcc68_get_gfsk_packet_status
uint8_t llcc68_get_gfsk_packet_status(llcc68_handle_t *handle, uint8_t *rx_status, uint8_t *rssi_sync_raw, uint8_t *rssi_avg_raw, float *rssi_sync, float *rssi_avg)
get the packet status in GFSK mode
Definition: driver_llcc68.c:3318
llcc68_get_status
uint8_t llcc68_get_status(llcc68_handle_t *handle, uint8_t *status)
get the status
Definition: driver_llcc68.c:3219
llcc68_gfsk_bit_rate_convert_to_register
uint8_t llcc68_gfsk_bit_rate_convert_to_register(llcc68_handle_t *handle, uint32_t br, uint32_t *reg)
convert the bit rate to the register raw data
Definition: driver_llcc68.c:2776
llcc68_clear_irq_status
uint8_t llcc68_clear_irq_status(llcc68_handle_t *handle, uint16_t clear_irq_param)
clear the irq status
Definition: driver_llcc68.c:2334
llcc68_get_packet_type
uint8_t llcc68_get_packet_type(llcc68_handle_t *handle, llcc68_packet_type_t *type)
get the packet type
Definition: driver_llcc68.c:2626
llcc68_tcxo_voltage_t
llcc68_tcxo_voltage_t
llcc68 tcxo voltage enumeration definition
Definition: driver_llcc68.h:140
llcc68_get_instantaneous_rssi
uint8_t llcc68_get_instantaneous_rssi(llcc68_handle_t *handle, uint8_t *rssi_inst_raw, float *rssi_inst)
get the instantaneous rssi
Definition: driver_llcc68.c:3427
llcc68_handle_t
struct llcc68_handle_s llcc68_handle_t
llcc68 handle structure definition
llcc68_deinit
uint8_t llcc68_deinit(llcc68_handle_t *handle)
close the chip
Definition: driver_llcc68.c:754
llcc68_write_register
uint8_t llcc68_write_register(llcc68_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
write the register
Definition: driver_llcc68.c:1302
llcc68_regulator_mode_t
llcc68_regulator_mode_t
llcc68 regulator mode enumeration definition
Definition: driver_llcc68.h:90
llcc68_gfsk_bit_rate_convert_to_data
uint8_t llcc68_gfsk_bit_rate_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *br)
convert the register raw data to the bit rate
Definition: driver_llcc68.c:2803
llcc68_start_mode_t
llcc68_start_mode_t
llcc68 start mode enumeration definition
Definition: driver_llcc68.h:72
llcc68_set_gfsk_modulation_params
uint8_t llcc68_set_gfsk_modulation_params(llcc68_handle_t *handle, uint32_t br, llcc68_gfsk_pulse_shape_t shape, llcc68_gfsk_bandwidth_t bw, uint32_t fdev)
set the modulation params in GFSK mode
Definition: driver_llcc68.c:2723
llcc68_set_rx
uint8_t llcc68_set_rx(llcc68_handle_t *handle, uint32_t timeout)
enter to the rx mode
Definition: driver_llcc68.c:1665
llcc68_get_device_errors
uint8_t llcc68_get_device_errors(llcc68_handle_t *handle, uint16_t *op_error)
get the device errors
Definition: driver_llcc68.c:3577
llcc68_single_receive
uint8_t llcc68_single_receive(llcc68_handle_t *handle, double us)
enter to the single receive mode
Definition: driver_llcc68.c:821
llcc68_reset_stats
uint8_t llcc68_reset_stats(llcc68_handle_t *handle, uint16_t pkt_received, uint16_t pkt_crc_error, uint16_t pkt_length_header_error)
reset the stats
Definition: driver_llcc68.c:3526
llcc68_ramp_time_t
llcc68_ramp_time_t
llcc68 ramp time enumeration definition
Definition: driver_llcc68.h:164
llcc68_set_calibration_image
uint8_t llcc68_set_calibration_image(llcc68_handle_t *handle, uint8_t freq1, uint8_t freq2)
set the calibration image frequency
Definition: driver_llcc68.c:2087
llcc68_fsk_rx_status_t
llcc68_fsk_rx_status_t
llcc68 fsk rx status enumeration definition
Definition: driver_llcc68.h:341
llcc68_set_stop_timer_on_preamble
uint8_t llcc68_set_stop_timer_on_preamble(llcc68_handle_t *handle, llcc68_bool_t enable)
stop timer on preamble
Definition: driver_llcc68.c:1767
llcc68_set_regulator_mode
uint8_t llcc68_set_regulator_mode(llcc68_handle_t *handle, llcc68_regulator_mode_t mode)
set the regulator_mode
Definition: driver_llcc68.c:1994
llcc68_lora_cad_symbol_num_t
llcc68_lora_cad_symbol_num_t
llcc68 lora cad symbol num enumeration definition
Definition: driver_llcc68.h:317
llcc68_set_tx_continuous_wave
uint8_t llcc68_set_tx_continuous_wave(llcc68_handle_t *handle)
enter to the tx continuous wave mode
Definition: driver_llcc68.c:1907
llcc68_get_rx_buffer_status
uint8_t llcc68_get_rx_buffer_status(llcc68_handle_t *handle, uint8_t *payload_length_rx, uint8_t *rx_start_buffer_pointer)
get the rx buffer status
Definition: driver_llcc68.c:3267
llcc68_timeout_convert_to_register
uint8_t llcc68_timeout_convert_to_register(llcc68_handle_t *handle, double us, uint32_t *reg)
convert the timeout to the register raw data
Definition: driver_llcc68.c:1712
llcc68_set_lora_packet_params
uint8_t llcc68_set_lora_packet_params(llcc68_handle_t *handle, uint16_t preamble_length, llcc68_lora_header_t header_type, uint8_t payload_length, llcc68_lora_crc_type_t crc_type, llcc68_bool_t invert_iq_enable)
set the packet params in LoRa mode
Definition: driver_llcc68.c:3014
llcc68_gfsk_preamble_detector_length_t
llcc68_gfsk_preamble_detector_length_t
llcc68 gfsk preamble detector length enumeration definition
Definition: driver_llcc68.h:254
llcc68_set_rx_tx_fallback_mode
uint8_t llcc68_set_rx_tx_fallback_mode(llcc68_handle_t *handle, llcc68_rx_tx_fallback_mode_t mode)
set the rx tx fallback mode
Definition: driver_llcc68.c:2184
llcc68_set_lora_symb_num_timeout
uint8_t llcc68_set_lora_symb_num_timeout(llcc68_handle_t *handle, uint8_t symb_num)
set the lora symbol number timeout
Definition: driver_llcc68.c:3173
llcc68_set_sleep
uint8_t llcc68_set_sleep(llcc68_handle_t *handle, llcc68_start_mode_t mode, llcc68_bool_t rtc_wake_up_enable)
enter to the sleep mode
Definition: driver_llcc68.c:1481
llcc68_lora_cr_t
llcc68_lora_cr_t
llcc68 lora coding rate enumeration definition
Definition: driver_llcc68.h:243
llcc68_set_dio3_as_tcxo_ctrl
uint8_t llcc68_set_dio3_as_tcxo_ctrl(llcc68_handle_t *handle, llcc68_tcxo_voltage_t voltage, uint32_t delay)
set dio3 as tcxo ctrl
Definition: driver_llcc68.c:2428
llcc68_set_tx_params
uint8_t llcc68_set_tx_params(llcc68_handle_t *handle, int8_t dbm, llcc68_ramp_time_t t)
set the tx params
Definition: driver_llcc68.c:2673
llcc68_continuous_receive
uint8_t llcc68_continuous_receive(llcc68_handle_t *handle)
enter to the continuous receive mode
Definition: driver_llcc68.c:890
llcc68_set_frequency_synthesis
uint8_t llcc68_set_frequency_synthesis(llcc68_handle_t *handle)
enter to the frequency synthesis mode
Definition: driver_llcc68.c:1572
llcc68_calibration_t
llcc68_calibration_t
llcc68 calibration enumeration definition
Definition: driver_llcc68.h:99
llcc68_info_t
struct llcc68_info_s llcc68_info_t
llcc68 information structure definition
llcc68_read_register
uint8_t llcc68_read_register(llcc68_handle_t *handle, uint16_t reg, uint8_t *buf, uint16_t len)
read the register
Definition: driver_llcc68.c:1347
llcc68_set_cad_params
uint8_t llcc68_set_cad_params(llcc68_handle_t *handle, llcc68_lora_cad_symbol_num_t num, uint8_t cad_det_peak, uint8_t cad_det_min, llcc68_lora_cad_exit_mode_t mode, uint32_t timeout)
set the cad params
Definition: driver_llcc68.c:3071
llcc68_set_calibration
uint8_t llcc68_set_calibration(llcc68_handle_t *handle, uint8_t settings)
set the calibration settings
Definition: driver_llcc68.c:2040
llcc68_set_gfsk_packet_params
uint8_t llcc68_set_gfsk_packet_params(llcc68_handle_t *handle, uint16_t preamble_length, llcc68_gfsk_preamble_detector_length_t detector_length, uint8_t sync_word_length, llcc68_gfsk_addr_filter_t filter, llcc68_gfsk_packet_type_t packet_type, uint8_t payload_length, llcc68_gfsk_crc_type_t crc_type, llcc68_bool_t whitening_enable)
set the packet params in GFSK mode
Definition: driver_llcc68.c:2946
llcc68_gfsk_bandwidth_t
llcc68_gfsk_bandwidth_t
llcc68 gfsk bandwidth enumeration definition
Definition: driver_llcc68.h:191
llcc68_set_dio_irq_params
uint8_t llcc68_set_dio_irq_params(llcc68_handle_t *handle, uint16_t irq_mask, uint16_t dio1_mask, uint16_t dio2_mask, uint16_t dio3_mask)
set the dio irq params
Definition: driver_llcc68.c:2233
llcc68_packet_type_t
llcc68_packet_type_t
llcc68 packet type enumeration definition
Definition: driver_llcc68.h:155
llcc68_set_cad
uint8_t llcc68_set_cad(llcc68_handle_t *handle)
run the cad
Definition: driver_llcc68.c:1864
llcc68_set_standby
uint8_t llcc68_set_standby(llcc68_handle_t *handle, llcc68_clock_source_t src)
enter to the standby mode
Definition: driver_llcc68.c:1527
llcc68_set_tx_infinite_preamble
uint8_t llcc68_set_tx_infinite_preamble(llcc68_handle_t *handle)
enter to the tx infinite preamble mode
Definition: driver_llcc68.c:1950
llcc68_gfsk_frequency_deviation_convert_to_register
uint8_t llcc68_gfsk_frequency_deviation_convert_to_register(llcc68_handle_t *handle, uint32_t freq, uint32_t *reg)
convert the frequency deviation to the register raw data
Definition: driver_llcc68.c:2830
llcc68_set_buffer_base_address
uint8_t llcc68_set_buffer_base_address(llcc68_handle_t *handle, uint8_t tx_base_addr, uint8_t rx_base_addr)
set the buffer base address
Definition: driver_llcc68.c:3126
llcc68_get_irq_status
uint8_t llcc68_get_irq_status(llcc68_handle_t *handle, uint16_t *status)
get the irq status
Definition: driver_llcc68.c:2288
llcc68_timeout_convert_to_data
uint8_t llcc68_timeout_convert_to_data(llcc68_handle_t *handle, uint32_t reg, double *us)
convert the register raw data to the timeout
Definition: driver_llcc68.c:1739
llcc68_get_stats
uint8_t llcc68_get_stats(llcc68_handle_t *handle, uint16_t *pkt_received, uint16_t *pkt_crc_error, uint16_t *pkt_length_header_error)
get the stats
Definition: driver_llcc68.c:3476
llcc68_op_error_t
llcc68_op_error_t
llcc68 op error enumeration definition
Definition: driver_llcc68.h:356
llcc68_gfsk_addr_filter_t
llcc68_gfsk_addr_filter_t
llcc68 gfsk addr filter enumeration definition
Definition: driver_llcc68.h:266
llcc68_lora_header_t
llcc68_lora_header_t
llcc68 lora header enumeration definition
Definition: driver_llcc68.h:299
llcc68_frequency_convert_to_register
uint8_t llcc68_frequency_convert_to_register(llcc68_handle_t *handle, uint32_t freq, uint32_t *reg)
convert the frequency to the register raw data
Definition: driver_llcc68.c:2476
llcc68_gfsk_pulse_shape_t
llcc68_gfsk_pulse_shape_t
llcc68 gfsk pulse shape enumeration definition
Definition: driver_llcc68.h:179
llcc68_rx_tx_fallback_mode_t
llcc68_rx_tx_fallback_mode_t
llcc68 rx tx fallback mode enumeration definition
Definition: driver_llcc68.h:130
llcc68_write_buffer
uint8_t llcc68_write_buffer(llcc68_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
write the buffer
Definition: driver_llcc68.c:1392
llcc68_frequency_convert_to_data
uint8_t llcc68_frequency_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *freq)
convert the register raw data to the frequency
Definition: driver_llcc68.c:2503
llcc68_lora_cad
uint8_t llcc68_lora_cad(llcc68_handle_t *handle, llcc68_bool_t *enable)
run the cad
Definition: driver_llcc68.c:959
llcc68_set_dio2_as_rf_switch_ctrl
uint8_t llcc68_set_dio2_as_rf_switch_ctrl(llcc68_handle_t *handle, llcc68_bool_t enable)
set dio2 as rf switch ctrl
Definition: driver_llcc68.c:2381
llcc68_read_buffer
uint8_t llcc68_read_buffer(llcc68_handle_t *handle, uint8_t offset, uint8_t *buf, uint16_t len)
read the buffer
Definition: driver_llcc68.c:1437
llcc68_set_rx_duty_cycle
uint8_t llcc68_set_rx_duty_cycle(llcc68_handle_t *handle, uint32_t rx_period, uint32_t sleep_period)
set the rx duty cycle
Definition: driver_llcc68.c:1814
llcc68_set_tx
uint8_t llcc68_set_tx(llcc68_handle_t *handle, uint32_t timeout)
enter to the tx mode
Definition: driver_llcc68.c:1616
llcc68_set_packet_type
uint8_t llcc68_set_packet_type(llcc68_handle_t *handle, llcc68_packet_type_t type)
set the packet type
Definition: driver_llcc68.c:2580
llcc68_lora_cad_exit_mode_t
llcc68_lora_cad_exit_mode_t
llcc68 lora cad exit mode enumeration definition
Definition: driver_llcc68.h:329
llcc68_init
uint8_t llcc68_init(llcc68_handle_t *handle)
initialize the chip
Definition: driver_llcc68.c:583
llcc68_gfsk_frequency_deviation_convert_to_data
uint8_t llcc68_gfsk_frequency_deviation_convert_to_data(llcc68_handle_t *handle, uint32_t reg, uint32_t *freq)
convert the register raw data to the frequency deviation
Definition: driver_llcc68.c:2857
LLCC68_LORA_CRC_TYPE_OFF
@ LLCC68_LORA_CRC_TYPE_OFF
Definition: driver_llcc68.h:309
LLCC68_LORA_CRC_TYPE_ON
@ LLCC68_LORA_CRC_TYPE_ON
Definition: driver_llcc68.h:310
LLCC68_LORA_BANDWIDTH_500_KHZ
@ LLCC68_LORA_BANDWIDTH_500_KHZ
Definition: driver_llcc68.h:236
LLCC68_LORA_BANDWIDTH_125_KHZ
@ LLCC68_LORA_BANDWIDTH_125_KHZ
Definition: driver_llcc68.h:234
LLCC68_LORA_BANDWIDTH_250_KHZ
@ LLCC68_LORA_BANDWIDTH_250_KHZ
Definition: driver_llcc68.h:235
LLCC68_BOOL_TRUE
@ LLCC68_BOOL_TRUE
Definition: driver_llcc68.h:65
LLCC68_BOOL_FALSE
@ LLCC68_BOOL_FALSE
Definition: driver_llcc68.h:64
LLCC68_GFSK_PACKET_TYPE_KNOWN_LENGTH
@ LLCC68_GFSK_PACKET_TYPE_KNOWN_LENGTH
Definition: driver_llcc68.h:277
LLCC68_GFSK_PACKET_TYPE_VARIABLE_SIZE
@ LLCC68_GFSK_PACKET_TYPE_VARIABLE_SIZE
Definition: driver_llcc68.h:279
LLCC68_CLOCK_SOURCE_RC_13M
@ LLCC68_CLOCK_SOURCE_RC_13M
Definition: driver_llcc68.h:82
LLCC68_CLOCK_SOURCE_XTAL_32MHZ
@ LLCC68_CLOCK_SOURCE_XTAL_32MHZ
Definition: driver_llcc68.h:83
LLCC68_LORA_SF_7
@ LLCC68_LORA_SF_7
Definition: driver_llcc68.h:222
LLCC68_LORA_SF_9
@ LLCC68_LORA_SF_9
Definition: driver_llcc68.h:224
LLCC68_LORA_SF_11
@ LLCC68_LORA_SF_11
Definition: driver_llcc68.h:226
LLCC68_LORA_SF_8
@ LLCC68_LORA_SF_8
Definition: driver_llcc68.h:223
LLCC68_LORA_SF_10
@ LLCC68_LORA_SF_10
Definition: driver_llcc68.h:225
LLCC68_LORA_SF_5
@ LLCC68_LORA_SF_5
Definition: driver_llcc68.h:220
LLCC68_LORA_SF_6
@ LLCC68_LORA_SF_6
Definition: driver_llcc68.h:221
LLCC68_IRQ_PREAMBLE_DETECTED
@ LLCC68_IRQ_PREAMBLE_DETECTED
Definition: driver_llcc68.h:116
LLCC68_IRQ_TX_DONE
@ LLCC68_IRQ_TX_DONE
Definition: driver_llcc68.h:114
LLCC68_IRQ_HEADER_ERR
@ LLCC68_IRQ_HEADER_ERR
Definition: driver_llcc68.h:119
LLCC68_IRQ_CRC_ERR
@ LLCC68_IRQ_CRC_ERR
Definition: driver_llcc68.h:120
LLCC68_IRQ_RX_DONE
@ LLCC68_IRQ_RX_DONE
Definition: driver_llcc68.h:115
LLCC68_IRQ_CAD_DETECTED
@ LLCC68_IRQ_CAD_DETECTED
Definition: driver_llcc68.h:122
LLCC68_IRQ_HEADER_VALID
@ LLCC68_IRQ_HEADER_VALID
Definition: driver_llcc68.h:118
LLCC68_IRQ_TIMEOUT
@ LLCC68_IRQ_TIMEOUT
Definition: driver_llcc68.h:123
LLCC68_IRQ_SYNC_WORD_VALID
@ LLCC68_IRQ_SYNC_WORD_VALID
Definition: driver_llcc68.h:117
LLCC68_IRQ_CAD_DONE
@ LLCC68_IRQ_CAD_DONE
Definition: driver_llcc68.h:121
LLCC68_GFSK_CRC_TYPE_1_BYTE_INV
@ LLCC68_GFSK_CRC_TYPE_1_BYTE_INV
Definition: driver_llcc68.h:291
LLCC68_GFSK_CRC_TYPE_2_BYTE_INV
@ LLCC68_GFSK_CRC_TYPE_2_BYTE_INV
Definition: driver_llcc68.h:292
LLCC68_GFSK_CRC_TYPE_1_BYTE
@ LLCC68_GFSK_CRC_TYPE_1_BYTE
Definition: driver_llcc68.h:289
LLCC68_GFSK_CRC_TYPE_OFF
@ LLCC68_GFSK_CRC_TYPE_OFF
Definition: driver_llcc68.h:288
LLCC68_GFSK_CRC_TYPE_2_BYTE
@ LLCC68_GFSK_CRC_TYPE_2_BYTE
Definition: driver_llcc68.h:290
LLCC68_TCXO_VOLTAGE_3P3V
@ LLCC68_TCXO_VOLTAGE_3P3V
Definition: driver_llcc68.h:148
LLCC68_TCXO_VOLTAGE_2P7V
@ LLCC68_TCXO_VOLTAGE_2P7V
Definition: driver_llcc68.h:146
LLCC68_TCXO_VOLTAGE_3P0V
@ LLCC68_TCXO_VOLTAGE_3P0V
Definition: driver_llcc68.h:147
LLCC68_TCXO_VOLTAGE_1P6V
@ LLCC68_TCXO_VOLTAGE_1P6V
Definition: driver_llcc68.h:141
LLCC68_TCXO_VOLTAGE_1P7V
@ LLCC68_TCXO_VOLTAGE_1P7V
Definition: driver_llcc68.h:142
LLCC68_TCXO_VOLTAGE_1P8V
@ LLCC68_TCXO_VOLTAGE_1P8V
Definition: driver_llcc68.h:143
LLCC68_TCXO_VOLTAGE_2P4V
@ LLCC68_TCXO_VOLTAGE_2P4V
Definition: driver_llcc68.h:145
LLCC68_TCXO_VOLTAGE_2P2V
@ LLCC68_TCXO_VOLTAGE_2P2V
Definition: driver_llcc68.h:144
LLCC68_REGULATOR_MODE_ONLY_LDO
@ LLCC68_REGULATOR_MODE_ONLY_LDO
Definition: driver_llcc68.h:91
LLCC68_REGULATOR_MODE_DC_DC_LDO
@ LLCC68_REGULATOR_MODE_DC_DC_LDO
Definition: driver_llcc68.h:92
LLCC68_START_MODE_COLD
@ LLCC68_START_MODE_COLD
Definition: driver_llcc68.h:73
LLCC68_START_MODE_WARM
@ LLCC68_START_MODE_WARM
Definition: driver_llcc68.h:74
LLCC68_RAMP_TIME_10US
@ LLCC68_RAMP_TIME_10US
Definition: driver_llcc68.h:165
LLCC68_RAMP_TIME_80US
@ LLCC68_RAMP_TIME_80US
Definition: driver_llcc68.h:168
LLCC68_RAMP_TIME_20US
@ LLCC68_RAMP_TIME_20US
Definition: driver_llcc68.h:166
LLCC68_RAMP_TIME_40US
@ LLCC68_RAMP_TIME_40US
Definition: driver_llcc68.h:167
LLCC68_RAMP_TIME_1700US
@ LLCC68_RAMP_TIME_1700US
Definition: driver_llcc68.h:171
LLCC68_RAMP_TIME_800US
@ LLCC68_RAMP_TIME_800US
Definition: driver_llcc68.h:170
LLCC68_RAMP_TIME_3400US
@ LLCC68_RAMP_TIME_3400US
Definition: driver_llcc68.h:172
LLCC68_RAMP_TIME_200US
@ LLCC68_RAMP_TIME_200US
Definition: driver_llcc68.h:169
LLCC68_FSK_RX_STATUS_PKT_RECEIVED
@ LLCC68_FSK_RX_STATUS_PKT_RECEIVED
Definition: driver_llcc68.h:348
LLCC68_FSK_RX_STATUS_ADDR_ERR
@ LLCC68_FSK_RX_STATUS_ADDR_ERR
Definition: driver_llcc68.h:344
LLCC68_FSK_RX_STATUS_LENGTH_ERR
@ LLCC68_FSK_RX_STATUS_LENGTH_ERR
Definition: driver_llcc68.h:346
LLCC68_FSK_RX_STATUS_ABORT_ERR
@ LLCC68_FSK_RX_STATUS_ABORT_ERR
Definition: driver_llcc68.h:347
LLCC68_FSK_RX_STATUS_CRC_ERR
@ LLCC68_FSK_RX_STATUS_CRC_ERR
Definition: driver_llcc68.h:345
LLCC68_FSK_RX_STATUS_PKT_SEND
@ LLCC68_FSK_RX_STATUS_PKT_SEND
Definition: driver_llcc68.h:349
LLCC68_FSK_RX_STATUS_PREAMBLE_ERR
@ LLCC68_FSK_RX_STATUS_PREAMBLE_ERR
Definition: driver_llcc68.h:342
LLCC68_FSK_RX_STATUS_SYNC_ERR
@ LLCC68_FSK_RX_STATUS_SYNC_ERR
Definition: driver_llcc68.h:343
LLCC68_LORA_CAD_SYMBOL_NUM_4
@ LLCC68_LORA_CAD_SYMBOL_NUM_4
Definition: driver_llcc68.h:320
LLCC68_LORA_CAD_SYMBOL_NUM_2
@ LLCC68_LORA_CAD_SYMBOL_NUM_2
Definition: driver_llcc68.h:319
LLCC68_LORA_CAD_SYMBOL_NUM_8
@ LLCC68_LORA_CAD_SYMBOL_NUM_8
Definition: driver_llcc68.h:321
LLCC68_LORA_CAD_SYMBOL_NUM_16
@ LLCC68_LORA_CAD_SYMBOL_NUM_16
Definition: driver_llcc68.h:322
LLCC68_LORA_CAD_SYMBOL_NUM_1
@ LLCC68_LORA_CAD_SYMBOL_NUM_1
Definition: driver_llcc68.h:318
LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_24_BITS
@ LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_24_BITS
Definition: driver_llcc68.h:258
LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_16_BITS
@ LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_16_BITS
Definition: driver_llcc68.h:257
LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_32_BITS
@ LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_32_BITS
Definition: driver_llcc68.h:259
LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_8_BITS
@ LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_8_BITS
Definition: driver_llcc68.h:256
LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_OFF
@ LLCC68_GFSK_PREAMBLE_DETECTOR_LENGTH_OFF
Definition: driver_llcc68.h:255
LLCC68_LORA_CR_4_7
@ LLCC68_LORA_CR_4_7
Definition: driver_llcc68.h:246
LLCC68_LORA_CR_4_5
@ LLCC68_LORA_CR_4_5
Definition: driver_llcc68.h:244
LLCC68_LORA_CR_4_6
@ LLCC68_LORA_CR_4_6
Definition: driver_llcc68.h:245
LLCC68_LORA_CR_4_8
@ LLCC68_LORA_CR_4_8
Definition: driver_llcc68.h:247
LLCC68_CALIBRATION_ADC_BULK_P
@ LLCC68_CALIBRATION_ADC_BULK_P
Definition: driver_llcc68.h:105
LLCC68_CALIBRATION_PLL
@ LLCC68_CALIBRATION_PLL
Definition: driver_llcc68.h:102
LLCC68_CALIBRATION_IMAGE
@ LLCC68_CALIBRATION_IMAGE
Definition: driver_llcc68.h:106
LLCC68_CALIBRATION_ADC_BULK_N
@ LLCC68_CALIBRATION_ADC_BULK_N
Definition: driver_llcc68.h:104
LLCC68_CALIBRATION_RC13M
@ LLCC68_CALIBRATION_RC13M
Definition: driver_llcc68.h:101
LLCC68_CALIBRATION_RC64K
@ LLCC68_CALIBRATION_RC64K
Definition: driver_llcc68.h:100
LLCC68_CALIBRATION_ADC_PULSE
@ LLCC68_CALIBRATION_ADC_PULSE
Definition: driver_llcc68.h:103
LLCC68_GFSK_BANDWIDTH_312_KHZ
@ LLCC68_GFSK_BANDWIDTH_312_KHZ
Definition: driver_llcc68.h:210
LLCC68_GFSK_BANDWIDTH_93P8_KHZ
@ LLCC68_GFSK_BANDWIDTH_93P8_KHZ
Definition: driver_llcc68.h:205
LLCC68_GFSK_BANDWIDTH_29P3_KHZ
@ LLCC68_GFSK_BANDWIDTH_29P3_KHZ
Definition: driver_llcc68.h:200
LLCC68_GFSK_BANDWIDTH_156P2_KHZ
@ LLCC68_GFSK_BANDWIDTH_156P2_KHZ
Definition: driver_llcc68.h:207
LLCC68_GFSK_BANDWIDTH_11P7_KHZ
@ LLCC68_GFSK_BANDWIDTH_11P7_KHZ
Definition: driver_llcc68.h:196
LLCC68_GFSK_BANDWIDTH_467_KHZ
@ LLCC68_GFSK_BANDWIDTH_467_KHZ
Definition: driver_llcc68.h:212
LLCC68_GFSK_BANDWIDTH_39_KHZ
@ LLCC68_GFSK_BANDWIDTH_39_KHZ
Definition: driver_llcc68.h:201
LLCC68_GFSK_BANDWIDTH_373P6_KHZ
@ LLCC68_GFSK_BANDWIDTH_373P6_KHZ
Definition: driver_llcc68.h:211
LLCC68_GFSK_BANDWIDTH_78P2_KHZ
@ LLCC68_GFSK_BANDWIDTH_78P2_KHZ
Definition: driver_llcc68.h:204
LLCC68_GFSK_BANDWIDTH_14P6_KHZ
@ LLCC68_GFSK_BANDWIDTH_14P6_KHZ
Definition: driver_llcc68.h:197
LLCC68_GFSK_BANDWIDTH_7P3_KHZ
@ LLCC68_GFSK_BANDWIDTH_7P3_KHZ
Definition: driver_llcc68.h:194
LLCC68_GFSK_BANDWIDTH_58P6_KHZ
@ LLCC68_GFSK_BANDWIDTH_58P6_KHZ
Definition: driver_llcc68.h:203
LLCC68_GFSK_BANDWIDTH_46P9_KHZ
@ LLCC68_GFSK_BANDWIDTH_46P9_KHZ
Definition: driver_llcc68.h:202
LLCC68_GFSK_BANDWIDTH_9P7_KHZ
@ LLCC68_GFSK_BANDWIDTH_9P7_KHZ
Definition: driver_llcc68.h:195
LLCC68_GFSK_BANDWIDTH_187P2_KHZ
@ LLCC68_GFSK_BANDWIDTH_187P2_KHZ
Definition: driver_llcc68.h:208
LLCC68_GFSK_BANDWIDTH_232P3_KHZ
@ LLCC68_GFSK_BANDWIDTH_232P3_KHZ
Definition: driver_llcc68.h:209
LLCC68_GFSK_BANDWIDTH_117P3_KHZ
@ LLCC68_GFSK_BANDWIDTH_117P3_KHZ
Definition: driver_llcc68.h:206
LLCC68_GFSK_BANDWIDTH_19P5_KHZ
@ LLCC68_GFSK_BANDWIDTH_19P5_KHZ
Definition: driver_llcc68.h:198
LLCC68_GFSK_BANDWIDTH_5P8_KHZ
@ LLCC68_GFSK_BANDWIDTH_5P8_KHZ
Definition: driver_llcc68.h:193
LLCC68_GFSK_BANDWIDTH_4P8_KHZ
@ LLCC68_GFSK_BANDWIDTH_4P8_KHZ
Definition: driver_llcc68.h:192
LLCC68_GFSK_BANDWIDTH_23P4_KHZ
@ LLCC68_GFSK_BANDWIDTH_23P4_KHZ
Definition: driver_llcc68.h:199
LLCC68_PACKET_TYPE_LORA
@ LLCC68_PACKET_TYPE_LORA
Definition: driver_llcc68.h:157
LLCC68_PACKET_TYPE_GFSK
@ LLCC68_PACKET_TYPE_GFSK
Definition: driver_llcc68.h:156
LLCC68_OP_ERROR_PLL_CALIB_ERR
@ LLCC68_OP_ERROR_PLL_CALIB_ERR
Definition: driver_llcc68.h:362
LLCC68_OP_ERROR_PLL_LOCK_ERR
@ LLCC68_OP_ERROR_PLL_LOCK_ERR
Definition: driver_llcc68.h:358
LLCC68_OP_ERROR_PA_RAMP_ERR
@ LLCC68_OP_ERROR_PA_RAMP_ERR
Definition: driver_llcc68.h:357
LLCC68_OP_ERROR_RC13M_CALIB_ERR
@ LLCC68_OP_ERROR_RC13M_CALIB_ERR
Definition: driver_llcc68.h:363
LLCC68_OP_ERROR_ADC_CALIB_ERR
@ LLCC68_OP_ERROR_ADC_CALIB_ERR
Definition: driver_llcc68.h:361
LLCC68_OP_ERROR_RC64K_CALIB_ERR
@ LLCC68_OP_ERROR_RC64K_CALIB_ERR
Definition: driver_llcc68.h:364
LLCC68_OP_ERROR_XOSC_START_ERR
@ LLCC68_OP_ERROR_XOSC_START_ERR
Definition: driver_llcc68.h:359
LLCC68_OP_ERROR_IMG_CALIB_ERR
@ LLCC68_OP_ERROR_IMG_CALIB_ERR
Definition: driver_llcc68.h:360
LLCC68_GFSK_ADDR_FILTER_DISABLE
@ LLCC68_GFSK_ADDR_FILTER_DISABLE
Definition: driver_llcc68.h:267
LLCC68_GFSK_ADDR_FILTER_ACTIVATED_NODE_BROADCAST_ADDR
@ LLCC68_GFSK_ADDR_FILTER_ACTIVATED_NODE_BROADCAST_ADDR
Definition: driver_llcc68.h:269
LLCC68_GFSK_ADDR_FILTER_ACTIVATED_NODE_ADDR
@ LLCC68_GFSK_ADDR_FILTER_ACTIVATED_NODE_ADDR
Definition: driver_llcc68.h:268
LLCC68_LORA_HEADER_IMPLICIT
@ LLCC68_LORA_HEADER_IMPLICIT
Definition: driver_llcc68.h:301
LLCC68_LORA_HEADER_EXPLICIT
@ LLCC68_LORA_HEADER_EXPLICIT
Definition: driver_llcc68.h:300
LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P7
@ LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P7
Definition: driver_llcc68.h:183
LLCC68_GFSK_PULSE_SHAPE_NO_FILTER
@ LLCC68_GFSK_PULSE_SHAPE_NO_FILTER
Definition: driver_llcc68.h:180
LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P3
@ LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P3
Definition: driver_llcc68.h:181
LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_1
@ LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_1
Definition: driver_llcc68.h:184
LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P5
@ LLCC68_GFSK_PULSE_SHAPE_GAUSSIAN_BT_0P5
Definition: driver_llcc68.h:182
LLCC68_RX_TX_FALLBACK_MODE_STDBY_RC
@ LLCC68_RX_TX_FALLBACK_MODE_STDBY_RC
Definition: driver_llcc68.h:133
LLCC68_RX_TX_FALLBACK_MODE_STDBY_XOSC
@ LLCC68_RX_TX_FALLBACK_MODE_STDBY_XOSC
Definition: driver_llcc68.h:132
LLCC68_RX_TX_FALLBACK_MODE_FS
@ LLCC68_RX_TX_FALLBACK_MODE_FS
Definition: driver_llcc68.h:131
LLCC68_LORA_CAD_EXIT_MODE_ONLY
@ LLCC68_LORA_CAD_EXIT_MODE_ONLY
Definition: driver_llcc68.h:330
LLCC68_LORA_CAD_EXIT_MODE_RX
@ LLCC68_LORA_CAD_EXIT_MODE_RX
Definition: driver_llcc68.h:332
llcc68_write_read_reg
uint8_t llcc68_write_read_reg(llcc68_handle_t *handle, uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len)
write and read register
Definition: driver_llcc68.c:5586
llcc68_set_dio_output_enable
uint8_t llcc68_set_dio_output_enable(llcc68_handle_t *handle, uint8_t enable)
set the dio output enable
Definition: driver_llcc68.c:5232
llcc68_get_dio_output_enable
uint8_t llcc68_get_dio_output_enable(llcc68_handle_t *handle, uint8_t *enable)
get the dio output enable
Definition: driver_llcc68.c:5276
llcc68_set_fsk_sync_word
uint8_t llcc68_set_fsk_sync_word(llcc68_handle_t *handle, uint8_t sync_word[8])
set the sync word in FSK mode
Definition: driver_llcc68.c:3948
llcc68_get_fsk_broadcast_address
uint8_t llcc68_get_fsk_broadcast_address(llcc68_handle_t *handle, uint8_t *addr)
get the broadcast address in FSK mode
Definition: driver_llcc68.c:4168
llcc68_set_xta_trim
uint8_t llcc68_set_xta_trim(llcc68_handle_t *handle, uint8_t trim)
set the xta trim
Definition: driver_llcc68.c:4880
llcc68_get_fsk_sync_word
uint8_t llcc68_get_fsk_sync_word(llcc68_handle_t *handle, uint8_t sync_word[8])
get the sync word in FSK mode
Definition: driver_llcc68.c:3992
llcc68_set_iq_polarity
uint8_t llcc68_set_iq_polarity(llcc68_handle_t *handle, uint8_t setup)
set the iq polarity
Definition: driver_llcc68.c:4212
llcc68_set_lora_sync_word
uint8_t llcc68_set_lora_sync_word(llcc68_handle_t *handle, uint16_t sync_word)
set the lora sync word
Definition: driver_llcc68.c:4300
llcc68_get_pull_down_control
uint8_t llcc68_get_pull_down_control(llcc68_handle_t *handle, uint8_t *control)
get the pull down control
Definition: driver_llcc68.c:5540
llcc68_set_ocp
uint8_t llcc68_set_ocp(llcc68_handle_t *handle, uint8_t ocp)
set the ocp
Definition: driver_llcc68.c:4704
llcc68_set_tx_clamp_config
uint8_t llcc68_set_tx_clamp_config(llcc68_handle_t *handle, uint8_t config)
set the tx clamp config
Definition: driver_llcc68.c:4616
llcc68_get_iq_polarity
uint8_t llcc68_get_iq_polarity(llcc68_handle_t *handle, uint8_t *setup)
get the iq polarity
Definition: driver_llcc68.c:4256
llcc68_get_fsk_crc_initical_value
uint8_t llcc68_get_fsk_crc_initical_value(llcc68_handle_t *handle, uint16_t *value)
get the crc initical value in FSK mode
Definition: driver_llcc68.c:3809
llcc68_get_event_mask
uint8_t llcc68_get_event_mask(llcc68_handle_t *handle, uint8_t *mask)
get the event mask
Definition: driver_llcc68.c:5188
llcc68_get_fsk_node_address
uint8_t llcc68_get_fsk_node_address(llcc68_handle_t *handle, uint8_t *addr)
get the node address in FSK mode
Definition: driver_llcc68.c:4080
llcc68_get_rtc_control
uint8_t llcc68_get_rtc_control(llcc68_handle_t *handle, uint8_t *control)
get the rtc control
Definition: driver_llcc68.c:4836
llcc68_set_rx_gain
uint8_t llcc68_set_rx_gain(llcc68_handle_t *handle, uint8_t gain)
set the rx gain
Definition: driver_llcc68.c:4528
llcc68_get_xtb_trim
uint8_t llcc68_get_xtb_trim(llcc68_handle_t *handle, uint8_t *trim)
get the xtb trim
Definition: driver_llcc68.c:5012
llcc68_set_rtc_control
uint8_t llcc68_set_rtc_control(llcc68_handle_t *handle, uint8_t control)
set the rtc control
Definition: driver_llcc68.c:4792
llcc68_get_dio3_output_control
uint8_t llcc68_get_dio3_output_control(llcc68_handle_t *handle, uint8_t *control)
get the dio3 output
Definition: driver_llcc68.c:5100
llcc68_get_dio_input_enable
uint8_t llcc68_get_dio_input_enable(llcc68_handle_t *handle, uint8_t *enable)
get the dio input enable
Definition: driver_llcc68.c:5364
llcc68_get_xta_trim
uint8_t llcc68_get_xta_trim(llcc68_handle_t *handle, uint8_t *trim)
get the xta trim
Definition: driver_llcc68.c:4924
llcc68_set_pull_up_control
uint8_t llcc68_set_pull_up_control(llcc68_handle_t *handle, uint8_t control)
set the pull up control
Definition: driver_llcc68.c:5408
llcc68_set_fsk_whitening_initial_value
uint8_t llcc68_set_fsk_whitening_initial_value(llcc68_handle_t *handle, uint16_t value)
set the whitening initial value in FSK mode
Definition: driver_llcc68.c:3669
llcc68_set_event_mask
uint8_t llcc68_set_event_mask(llcc68_handle_t *handle, uint8_t mask)
set the event mask
Definition: driver_llcc68.c:5144
llcc68_set_dio3_output_control
uint8_t llcc68_set_dio3_output_control(llcc68_handle_t *handle, uint8_t control)
set the dio3 output
Definition: driver_llcc68.c:5056
llcc68_get_lora_sync_word
uint8_t llcc68_get_lora_sync_word(llcc68_handle_t *handle, uint16_t *sync_word)
get the lora sync word
Definition: driver_llcc68.c:4347
llcc68_get_random_number
uint8_t llcc68_get_random_number(llcc68_handle_t *handle, uint32_t *r)
get the random number
Definition: driver_llcc68.c:4393
llcc68_get_pull_up_control
uint8_t llcc68_get_pull_up_control(llcc68_handle_t *handle, uint8_t *control)
get the pull up control
Definition: driver_llcc68.c:5452
llcc68_set_fsk_broadcast_address
uint8_t llcc68_set_fsk_broadcast_address(llcc68_handle_t *handle, uint8_t addr)
set the broadcast address in FSK mode
Definition: driver_llcc68.c:4124
llcc68_get_rx_gain
uint8_t llcc68_get_rx_gain(llcc68_handle_t *handle, uint8_t *gain)
get the rx gain
Definition: driver_llcc68.c:4572
llcc68_set_fsk_crc_polynomial_value
uint8_t llcc68_set_fsk_crc_polynomial_value(llcc68_handle_t *handle, uint16_t value)
set the crc polynomial value in FSK mode
Definition: driver_llcc68.c:3855
llcc68_set_tx_modulation
uint8_t llcc68_set_tx_modulation(llcc68_handle_t *handle, uint8_t modulation)
set the tx modulation
Definition: driver_llcc68.c:4440
llcc68_set_fsk_node_address
uint8_t llcc68_set_fsk_node_address(llcc68_handle_t *handle, uint8_t addr)
set the node address in FSK mode
Definition: driver_llcc68.c:4036
llcc68_set_pull_down_control
uint8_t llcc68_set_pull_down_control(llcc68_handle_t *handle, uint8_t control)
set the pull down control
Definition: driver_llcc68.c:5496
llcc68_set_dio_input_enable
uint8_t llcc68_set_dio_input_enable(llcc68_handle_t *handle, uint8_t enable)
set the dio input enable
Definition: driver_llcc68.c:5320
llcc68_get_tx_modulation
uint8_t llcc68_get_tx_modulation(llcc68_handle_t *handle, uint8_t *modulation)
get the tx modulation
Definition: driver_llcc68.c:4484
llcc68_set_xtb_trim
uint8_t llcc68_set_xtb_trim(llcc68_handle_t *handle, uint8_t trim)
set the xtb trim
Definition: driver_llcc68.c:4968
llcc68_get_tx_clamp_config
uint8_t llcc68_get_tx_clamp_config(llcc68_handle_t *handle, uint8_t *config)
get the tx clamp config
Definition: driver_llcc68.c:4660
llcc68_get_ocp
uint8_t llcc68_get_ocp(llcc68_handle_t *handle, uint8_t *ocp)
get the ocp
Definition: driver_llcc68.c:4748
llcc68_get_fsk_whitening_initial_value
uint8_t llcc68_get_fsk_whitening_initial_value(llcc68_handle_t *handle, uint16_t *value)
get the whitening initial value in FSK mode
Definition: driver_llcc68.c:3716
llcc68_get_fsk_crc_polynomial_value
uint8_t llcc68_get_fsk_crc_polynomial_value(llcc68_handle_t *handle, uint16_t *value)
get the crc polynomial value in FSK mode
Definition: driver_llcc68.c:3902
llcc68_set_fsk_crc_initical_value
uint8_t llcc68_set_fsk_crc_initical_value(llcc68_handle_t *handle, uint16_t value)
set the crc initial value in FSK mode
Definition: driver_llcc68.c:3762
llcc68_handle_s
llcc68 handle structure definition
Definition: driver_llcc68.h:371
llcc68_handle_s::spi_write_read
uint8_t(* spi_write_read)(uint8_t *in_buf, uint32_t in_len, uint8_t *out_buf, uint32_t out_len)
Definition: driver_llcc68.h:380
llcc68_handle_s::inited
uint8_t inited
Definition: driver_llcc68.h:386
llcc68_handle_s::cad_detected
uint8_t cad_detected
Definition: driver_llcc68.h:389
llcc68_handle_s::spi_init
uint8_t(* spi_init)(void)
Definition: driver_llcc68.h:378
llcc68_handle_s::delay_ms
void(* delay_ms)(uint32_t ms)
Definition: driver_llcc68.h:382
llcc68_handle_s::tx_done
uint8_t tx_done
Definition: driver_llcc68.h:387
llcc68_handle_s::busy_gpio_init
uint8_t(* busy_gpio_init)(void)
Definition: driver_llcc68.h:375
llcc68_handle_s::receive_callback
void(* receive_callback)(uint16_t type, uint8_t *buf, uint16_t len)
Definition: driver_llcc68.h:384
llcc68_handle_s::reset_gpio_deinit
uint8_t(* reset_gpio_deinit)(void)
Definition: driver_llcc68.h:373
llcc68_handle_s::debug_print
void(* debug_print)(const char *const fmt,...)
Definition: driver_llcc68.h:383
llcc68_handle_s::cad_done
uint8_t cad_done
Definition: driver_llcc68.h:388
llcc68_handle_s::busy_gpio_deinit
uint8_t(* busy_gpio_deinit)(void)
Definition: driver_llcc68.h:376
llcc68_handle_s::spi_deinit
uint8_t(* spi_deinit)(void)
Definition: driver_llcc68.h:379
llcc68_handle_s::reset_gpio_init
uint8_t(* reset_gpio_init)(void)
Definition: driver_llcc68.h:372
llcc68_handle_s::crc_error
uint8_t crc_error
Definition: driver_llcc68.h:390
llcc68_handle_s::timeout
uint8_t timeout
Definition: driver_llcc68.h:391
llcc68_handle_s::receive_buf
uint8_t receive_buf[256]
Definition: driver_llcc68.h:393
llcc68_handle_s::busy_gpio_read
uint8_t(* busy_gpio_read)(uint8_t *value)
Definition: driver_llcc68.h:377
llcc68_handle_s::buf
uint8_t buf[384]
Definition: driver_llcc68.h:392
llcc68_handle_s::reset_gpio_write
uint8_t(* reset_gpio_write)(uint8_t value)
Definition: driver_llcc68.h:374
llcc68_info_s
llcc68 information structure definition
Definition: driver_llcc68.h:400
llcc68_info_s::temperature_max
float temperature_max
Definition: driver_llcc68.h:408
llcc68_info_s::supply_voltage_max_v
float supply_voltage_max_v
Definition: driver_llcc68.h:405
llcc68_info_s::driver_version
uint32_t driver_version
Definition: driver_llcc68.h:409
llcc68_info_s::temperature_min
float temperature_min
Definition: driver_llcc68.h:407
llcc68_info_s::max_current_ma
float max_current_ma
Definition: driver_llcc68.h:406
llcc68_info_s::manufacturer_name
char manufacturer_name[32]
Definition: driver_llcc68.h:402
llcc68_info_s::supply_voltage_min_v
float supply_voltage_min_v
Definition: driver_llcc68.h:404
llcc68_info_s::interface
char interface[8]
Definition: driver_llcc68.h:403
llcc68_info_s::chip_name
char chip_name[32]
Definition: driver_llcc68.h:401