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## Filter checks

Passed |
Failed |
Warning |
Not Run |
Justified |
Incomplete |

## Navigation

Modeling Standards for ISO 26262
1 High-Integrity Systems
1.1 Simulink
1.2 Stateflow
1.3 MATLAB
1.4 Configuration
1.5 Naming
1.6 Requirements
1.7 Code

## View

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Model Advisor Report - dsogi_pll_3ph.slx
Simulink version: 10.7 | Model version: 1.64
System: dsogi_pll_3ph | Current run: 23-May-2024 19:50:17
Treat as Referenced Model: off |

Run Summary

Incomplete | Failed | Warning | Justified | Passed | Not Run | Total |
--- | --- | --- | --- | --- | --- | --- | ---
0 | 6 | 34 | 0 | 60 | 0 | 100 |

Error occurred during Simulink Design Verifier analysis.
Model 'dsogi_pll_3ph' callback InitFcn is not empty. Simulink Design Verifier does not support models with nonempty InitFcn callbacks. Please consider moving the contents of this callback to a different model callback.
See documentation.
Simulink Design Verifier failed to initialize: 'dsogi_pll_3ph' is incompatible for design error detection with Simulink Design Verifier.
Modeling Standards for ISO 26262
All checks hidden.

Display configuration management data

Display model configuration and checksum information
Model configuration and checksum information

Attribute | Value
--- | ---
Model Version | 1.64
Author | ASUSTUF
Date | Thu May 23 19:46:31 2024
Model Checksum | 1899492685 2050039349 2979829959 2121621267

Display model metrics and complexity report

Display number of elements and name, level, and depth of subsystems for the model or subsystem
Model metrics information
Display number of elements for Simulink blocks and Stateflow constructs
Summary

Element Type | Count
--- | ---
Inport | 37
Outport | 29
SubSystem | 21
MATLAB Function | 13

Simulink

Block Type | Count
--- | ---
Inport | 37
Outport | 29
SubSystem | 21
Memory | 18
MATLAB Function Block | 13
Constant | 7
RelationalOperator | 6
Terminator | 5
DataTypeConversion | 5
Logic | 4
Sin | 3
Trigonometry | 2
Gain | 1
Delay | 1
RateTransition | 1

∧ Less

Stateflow

Stateflow construct | Count
--- | ---
Stateflow Data | 63

_________________________________________________________________________________________

Model complexity information
Display name, level, and depth of subsystems
Maximum Subsystem Depth: 7
Subsystem Depth

Subsystem Name | Level | Depth
--- | --- | ---
dsogi_pll_3ph/Dsogi-PLL | 1 | 6
dsogi_pll_3ph/Dsogi-PLL/Clark Transform | 2 | 2
..../Dsogi-PLL/Clark Transform/clark_trafo | 3 | 1
dsogi_pll_3ph/Dsogi-PLL/DSOGI | 2 | 3
..../Dsogi-PLL/DSOGI/Dsogi alpha | 3 | 2
..../Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi | 4 | 1
..../Dsogi-PLL/DSOGI/Dsogi alpha1 | 3 | 2
..../Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi | 4 | 1
dsogi_pll_3ph/Dsogi-PLL/SC | 2 | 3
dsogi_pll_3ph/Dsogi-PLL/SC/NSC | 3 | 2
dsogi_pll_3ph/Dsogi-PLL/SC/NSC/a-b | 4 | 1
dsogi_pll_3ph/Dsogi-PLL/SC/NSC/sum | 4 | 1
dsogi_pll_3ph/Dsogi-PLL/SC/PSC | 3 | 2
dsogi_pll_3ph/Dsogi-PLL/SC/PSC/a-b1 | 4 | 1
dsogi_pll_3ph/Dsogi-PLL/SC/PSC/sum1 | 4 | 1
dsogi_pll_3ph/Dsogi-PLL/SC/sum | 3 | 1
dsogi_pll_3ph/Dsogi-PLL/SC/sum1 | 3 | 1
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL | 2 | 5
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/Cos | 3 | 1
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/LPF | 3 | 4
..../Low-Pass Filter (Discrete or Continuous) | 4 | 3
..../ReplicaOfSource | 5 | 2
..../Integrator (Discrete or Continuous) | 6 | 1
..../Dsogi-PLL/SRF_PLL/Phase Swap | 3 | 2
..../Dsogi-PLL/SRF_PLL/Phase Swap/Subsystem | 4 | 1
..../Dsogi-PLL/SRF_PLL/Phase Swap/Subsystem1 | 4 | 1
..../Dsogi-PLL/SRF_PLL/Phase Swap/Subsystem2 | 4 | 1
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/Sin | 3 | 1
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco | 3 | 1
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf | 3 | 1
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/pi_ctrl | 3 | 1
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/sum | 3 | 1

∧ Less

Check for unconnected objects

Identify unconnected lines, input ports, and output ports in the model
Passed
There are no unconnected lines, input ports, and output ports in this model.

1 High-Integrity Systems 0 6 34 0 57 0
All checks hidden.
1.1 Simulink 0 6 3 0 28 0
All checks hidden.

Check usage of Abs blocks

Identify Abs blocks that have unreachable code or produce overflows.
Passed
No Abs blocks found causing unreachable code or produce overflows.

Check usage of remainder and reciprocal operations

Error occurred during Simulink Design Verifier analysis.
Model 'dsogi_pll_3ph' callback InitFcn is not empty. Simulink Design Verifier does not support models with nonempty InitFcn callbacks. Please consider moving the contents of this callback to a different model callback.
See documentation.
Simulink Design Verifier failed to initialize: 'dsogi_pll_3ph' is incompatible for design error detection with Simulink Design Verifier.

Check usage of square root operations

Error occurred during Simulink Design Verifier analysis.
Model 'dsogi_pll_3ph' callback InitFcn is not empty. Simulink Design Verifier does not support models with nonempty InitFcn callbacks. Please consider moving the contents of this callback to a different model callback.
See documentation.
Simulink Design Verifier failed to initialize: 'dsogi_pll_3ph' is incompatible for design error detection with Simulink Design Verifier.

Check usage of log and log10 operations

Error occurred during Simulink Design Verifier analysis.
Model 'dsogi_pll_3ph' callback InitFcn is not empty. Simulink Design Verifier does not support models with nonempty InitFcn callbacks. Please consider moving the contents of this callback to a different model callback.
See documentation.
Simulink Design Verifier failed to initialize: 'dsogi_pll_3ph' is incompatible for design error detection with Simulink Design Verifier.

Check usage of While Iterator blocks

Identify While Iterator blocks that do not have a positive value for the maximum number of iterations.
Passed
No While Iterator blocks found that might cause infinite loops

Check usage of For and While Iterator subsystems

Identify sample time-dependent blocks in While and For Iterator subsystems.
Passed
No sample time-dependent blocks in For or While Iterator subsystems.

Check usage of For Iterator blocks

Identify For Iterator blocks that cause variable loops.
Passed
No For Iterator blocks found that cause variable loops.

Check usage of If blocks and If Action Subsystem blocks

Identify If and If Action Subsystem blocks without else conditions.
Passed
No If blocks with questionable configurations or connections were found.

Check usage of Switch Case blocks and Switch Case Action Subsystem blocks

Identify inappropriately used Switch Case blocks and Switch Case Action Subsystem blocks.
Passed
No Switch Case blocks with questionable configurations or connections were found.

Check usage of conditionally executed subsystems

Identify inappropriate blocks in conditionally executed subsystems.
Passed
No blocks with improper sample times or asynchronously executed sample-time dependent blocks were found.

Check usage of Merge blocks

Identify Merge blocks constructs which can lead to ambiguous behavior.
Passed
No merge blocks found which can lead to ambiguous behavior.

Check relational comparisons on floating-point signals

Identify relational blocks or operations that perform equality or inequality comparisons on floating-point data types.
Passed
No relational blocks or operations found that perform equality or inequality comparisons on floating-point data types.

Check usage of Relational Operator blocks

Identify Relational Operator blocks that operate on different data types or have a non-boolean output.
Passed
No Relational Operator blocks found that operate on different data types or have a non-boolean output.

Check usage of Logical Operator blocks

Identify Logical Operator blocks that operate on non-boolean data types.
Passed
No Logical Operator blocks found that operate on non-boolean data types.

Check usage of bitwise operations

Identify bit operations with signed data types as inputs.
Passed
No bit operation found with signed data types as inputs.

Check for blocks not recommended for C/C++ production code deployment

Identify blocks not supported by code generation or not recommended for C/C++ production code deployment.
Warning
The following blocks are not recommended for C/C++ production code generation:

- dsogi_pll_3ph/Phase A
- dsogi_pll_3ph/Phase B
- dsogi_pll_3ph/Phase C

Recommended Action
Although Embedded Coder supports these blocks, they are not recommended for C/C++ production code deployment.
1. These blocks do not reference absolute time when configured for sample-based operation. In time-based operation they depend on absolute time.

Check for inconsistent vector indexing methods

Identify inconsistent usage of vector indexing methods across the model or subsystem.
Passed
No blocks found using inconsistent indexing modes.

Check data types for blocks with index signals

Identify blocks with index signals that have data types other than integer or enum.
Passed
No blocks or charts found with index signals or variables that have data types other than integer or enum.

Check usage of variant blocks

Check variant block settings that might result in code that doesn't trace back to requirements.
Passed
No variant blocks have "VariantActivationTime" set to 'code compile'.

Check usage of lookup table blocks

Check for Lookup Table blocks, Prelookup blocks and Interpolation blocks that do not generate out-of-range checking code.
Passed
No lookup table blocks found to not generate out-of-range checking code.

Check usage of Signal Routing blocks

Identify usage of Signal Routing blocks in Simulink that might impact safety.
Passed
No Switch blocks that might generate code with inequality operations (~=) in expressions where at least one side of the expression is a floating-point variable or constant were found.

Check for root Input ports with missing properties

Identify Input ports in the top-level of the Simulink or Architecture models without fully defined sample times, data types, or port dimensions.
Passed
There are no Input ports in the top-level of the Simulink or Architecture models with missing or inherited sample times, data types, or port dimensions.

Check for root Input ports with missing range definitions

Identify root-level Input ports of Simulink or Architecture models with missing or erroneous minimum or maximum values.
Passed
No Input ports with missing range definitions in the top-level of the Simulink or Architecture model.

Check for root Output ports with missing range definitions

Identify root-level Output port blocks of Simulink or Architecture models with missing or erroneous minimum or maximum values.
Passed
No Output ports with missing range definitions in the top-level of the Simulink or Architecture model.

Check usage of Reciprocal Sqrt blocks

Error occurred during Simulink Design Verifier analysis.
Model 'dsogi_pll_3ph' callback InitFcn is not empty. Simulink Design Verifier does not support models with nonempty InitFcn callbacks. Please consider moving the contents of this callback to a different model callback.
See documentation.
Simulink Design Verifier failed to initialize: 'dsogi_pll_3ph' is incompatible for design error detection with Simulink Design Verifier.

Check usage of Assignment blocks

Identify Assignment blocks whose array fields are not initialized.
Passed
All Assignment blocks are configured with block parameter "Action if any output element is not assigned" set to Error.

Check global variables in graphical functions

Identify expressions that both read and write to the same global data.
Passed
No expressions found that both read and write to the same global data.

Check usage of Gain blocks

Identify Gain blocks with value which resolves to 1.
Warning
The following Gain blocks have value which resolves to 1.

- ..../SRF_PLL/LPF/Low-Pass Filter (Discrete or Continuous)/ReplicaOfSource/K

Recommended Action
Consider remodeling to remove the Gain blocks with values that resolve to 1

Check for length of user-defined object names

Identify user-defined object names with length greater than threshold.
Passed
No Subsystem blocks found with function name length greater than Maximum identifier length. There are no data objects with names having length greater than Maximum identifier length.

Check data type of loop control variables

Identify loop control variables using non-integer data types.
Passed
No For Iterator blocks or MATLAB Function blocks found using non-integer data type for loop control counter variable.

Check for divide-by-zero calculations

Error occurred during Simulink Design Verifier analysis.
Model 'dsogi_pll_3ph' callback InitFcn is not empty. Simulink Design Verifier does not support models with nonempty InitFcn callbacks. Please consider moving the contents of this callback to a different model callback.
See documentation.
Simulink Design Verifier failed to initialize: 'dsogi_pll_3ph' is incompatible for design error detection with Simulink Design Verifier.

Check for parameter tunability ignored for referenced models

Check for models parameter tunability information specified using Model Parameter Configuration dialog boxes.
Passed
No parameters found that lose the tunability defined in the referenced models.

Check usage of bit-shift operations

Identify blocks or expressions that perform bit-shift operations greater than the bit width of Input type.
Passed
No blocks or expressions found that perform bit-shift operations greater than the bit width of Input type.

Check safety-related diagnostic settings for variants

Check diagnostic settings in the model configuration that apply to variants and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Variant condition mismatch at signal source and destination (VariantConditionMismatch) | none | error

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check for disabled and parameterized library links

Identify disabled and parameterized library links in the model.
Passed
No blocks found that have disabled or parameterized library links.

Check for root Outports with missing properties

Identify Output ports in the top-level of the Simulink or Architecture models without fully defined sample times, data types, or port dimensions.
Passed
There are no Output ports in the top-level of the Simulink or Architecture models with missing or inherited sample times, data types, or port dimensions.

Check for unreachable and dead code

Error occurred during Simulink Design Verifier analysis.
Model 'dsogi_pll_3ph' callback InitFcn is not empty. Simulink Design Verifier does not support models with nonempty InitFcn callbacks. Please consider moving the contents of this callback to a different model callback.
See documentation.
Simulink Design Verifier failed to initialize: 'dsogi_pll_3ph' is incompatible for design error detection with Simulink Design Verifier.
1.2 Stateflow 0 0 1 0 11 0
All checks hidden.

Check state machine type of Stateflow charts

Identify Stateflow Charts whose State Machine Type differs from the type set in the Model Advisor Configuration Editor.
Passed
No Stateflow Charts found that deviate from recommended state machine type.

Check Stateflow charts for ordering of states and transitions

Identify Stateflow charts that do not use explicit ordering of parallel states and transitions.
Passed
No Stateflow Charts found that deviate from recommended state/transition execution order settings.

Check usage of recursions

Identify usage of recursive behavior.
Passed
No entities involved in recursions were found.

Check Stateflow debugging options

Identify whether Stateflow debugging options are set appropriately.
Warning
The following Stateflow debugging options are not set appropriately:

Parameter | Current Value | Recommended Values
--- | --- | ---
Wrap on overflow (IntegerOverflowMsg) | warning | error
Simulation range checking (SignalRangeChecking) | warning | error

Recommended Action
Change the Stateflow debugging options to the recommended value.

Check Stateflow charts for transition paths that cross parallel state boundaries

Identify transition paths that cross parallel state boundaries in Stateflow charts.
Passed
No transition paths crossing parallel state boundaries were found in Stateflow charts.

Check for inappropriate use of transition paths

Identify transition paths that go into and out of a state without ending on a substate.
Passed
No transition paths found that go into and out of a state without ending on a substate.

Check Stateflow charts for strong data typing

Identify expressions with variables and parameters of different data types in Stateflow objects.
Passed
No expressions were found with variables and parameters of different data types.

Check naming of ports in Stateflow charts

Identify mismatches between names of Stateflow ports and associated signals.
Passed
There are no name mismatches between Stateflow ports and associated signals

Check scoping of Stateflow data objects

Identify Stateflow data objects with local scope that are not scoped at the chart level or below.
Passed
All Stateflow data objects are properly scoped.

Check Stateflow charts for uniquely defined data objects

Identify local data identifiers that are defined in multiple scopes within a chart.
Passed
No Stateflow data identifiers found to be defined in multiple scopes.

Check assignment operations in Stateflow charts

Identify assignment operations in Stateflow objects which cast integer and fixed-point calculations to wider datatype.
Passed
No assignment operations were found which cast integer and fixed-point calculations to wider datatype.

Check Stateflow charts for unary operators

Identify unary minus operators on unsigned data types in Stateflow objects.
Passed
No unary minus operations on unsigned data types were found in Stateflow objects.

1.3 MATLAB 0 0 4 0 7 0
All checks hidden.

Check usage of standardized MATLAB function headers

Identify usage of standardized function headers in MATLAB function.
Warning
The following MATLAB functions use non-standard function headers:

Block Path | Expression
--- | ---
..../Dsogi-PLL/Clark Transform/clark_trafo | function [valpha,vbetha] = clarktrans(va,vb,vc)...
..../Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi | function [vd_sogi_alpha,vq_sogi_alpha] = sogi(v_ct_alpha,v_ct_alpha_k_1,v_ct_alpha_k_2,vd_sogi_alpha_k_1,vd_sogi_alpha_k_2,vq_sogi_alpha_k_1,vq_sogi_alpha_k_2,wolp)...
..../Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi | function [vd_sogi_alpha,vq_sogi_alpha] = sogi(v_ct_alpha,v_ct_alpha_k_1,v_ct_alpha_k_2,vd_sogi_alpha_k_1,vd_sogi_alpha_k_2,vq_sogi_alpha_k_1,vq_sogi_alpha_k_2,wolp)...
dsogi_pll_3ph/Dsogi-PLL/SC/NSC/a-b | function c = fcn(a,b)...
dsogi_pll_3ph/Dsogi-PLL/SC/NSC/sum | function c = fcn(a,b)...
dsogi_pll_3ph/Dsogi-PLL/SC/PSC/a-b1 | function c = fcn(a,b)...
dsogi_pll_3ph/Dsogi-PLL/SC/PSC/sum1 | function c = fcn(a,b)...
dsogi_pll_3ph/Dsogi-PLL/SC/sum | function c = fcn(a,b)...
dsogi_pll_3ph/Dsogi-PLL/SC/sum1 | function c = fcn(a,b)...
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf | function [vd_park,vq_park] = park(vp_alpha,vp_betha,sin_th_k_1,cos_th_k_1)...
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/pi_ctrl | function w_pi = pi_ctrl(vq_park,vq_park_k_1,w_pi_k_1)...
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/sum | function c = fcn(a,b)...

∧ Less
Recommended Action
Ensure that the function has standard function header.
_________________________________________________________________________________________

Identify usage of standardized function headers in MATLAB function.
Warning
The following MATLAB functions use non-standard function headers:

Block Path | Expression
--- | ---
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco | function [th,sin_th,cos_th] = dco(cos_th_1,sin_th_1,th_1,wo)...

Recommended Action
Ensure that the function header has a function description.

Check for MATLAB Function interfaces with inherited properties

Identify MATLAB Functions that have inputs, outputs, or parameters with inherited complexity or data type properties.
Warning
The following MATLAB Functions have interfaces of data type property set to 'Inherit: Same as Simulink' or 'Inherit: From definition in chart':

- dsogi_pll_3ph/Dsogi-PLL/Clark Transform/clark_trafo/va
- dsogi_pll_3ph/Dsogi-PLL/Clark Transform/clark_trafo/valpha
- dsogi_pll_3ph/Dsogi-PLL/Clark Transform/clark_trafo/vb
- dsogi_pll_3ph/Dsogi-PLL/Clark Transform/clark_trafo/vc
- dsogi_pll_3ph/Dsogi-PLL/Clark Transform/clark_trafo/vbetha
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/v_ct_alpha
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/vd_sogi_alpha
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/v_ct_alpha_k_1
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/v_ct_alpha_k_2
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/vd_sogi_alpha_k_1
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/vd_sogi_alpha_k_2
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/vq_sogi_alpha_k_1
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/vq_sogi_alpha_k_2
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/wolp
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/vq_sogi_alpha
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/v_ct_alpha
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/vd_sogi_alpha
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/v_ct_alpha_k_1
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/v_ct_alpha_k_2
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/vd_sogi_alpha_k_1
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/vd_sogi_alpha_k_2
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/vq_sogi_alpha_k_1
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/vq_sogi_alpha_k_2
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/wolp
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/vq_sogi_alpha
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/a-b/a
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/a-b/c
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/a-b/b
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/sum/a
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/sum/c
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/sum/b
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/a-b1/a
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/a-b1/c
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/a-b1/b
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/sum1/a
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/sum1/c
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/sum1/b
- dsogi_pll_3ph/Dsogi-PLL/SC/sum/a
- dsogi_pll_3ph/Dsogi-PLL/SC/sum/c
- dsogi_pll_3ph/Dsogi-PLL/SC/sum/b
- dsogi_pll_3ph/Dsogi-PLL/SC/sum1/a
- dsogi_pll_3ph/Dsogi-PLL/SC/sum1/c
- dsogi_pll_3ph/Dsogi-PLL/SC/sum1/b
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/cos_th_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/sin_th_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/th_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/th
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/sin_th
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/wo
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/cos_th
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf/vd_park
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf/vp_alpha
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf/vq_park
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf/vp_betha
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf/sin_th_k_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf/cos_th_k_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/pi_ctrl/vq_park
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/pi_ctrl/w_pi
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/pi_ctrl/vq_park_k_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/pi_ctrl/w_pi_k_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/sum/a
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/sum/c
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/sum/b

∧ Less
Recommended Action
Change data type of identified data objects from 'Inherit: Same as Simulink' or 'Inherit: From definition in chart' to an explicit data type.
_________________________________________________________________________________________

Identify MATLAB Functions that have inputs, outputs, or parameters with inherited complexity or data type properties.
Warning
The following MATLAB Functions have interfaces of complexity property set to 'Inherited':

- dsogi_pll_3ph/Dsogi-PLL/Clark Transform/clark_trafo/va
- dsogi_pll_3ph/Dsogi-PLL/Clark Transform/clark_trafo/valpha
- dsogi_pll_3ph/Dsogi-PLL/Clark Transform/clark_trafo/vb
- dsogi_pll_3ph/Dsogi-PLL/Clark Transform/clark_trafo/vc
- dsogi_pll_3ph/Dsogi-PLL/Clark Transform/clark_trafo/vbetha
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/v_ct_alpha
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/vd_sogi_alpha
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/v_ct_alpha_k_1
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/v_ct_alpha_k_2
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/vd_sogi_alpha_k_1
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/vd_sogi_alpha_k_2
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/vq_sogi_alpha_k_1
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/vq_sogi_alpha_k_2
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/wolp
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi/vq_sogi_alpha
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/v_ct_alpha
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/vd_sogi_alpha
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/v_ct_alpha_k_1
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/v_ct_alpha_k_2
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/vd_sogi_alpha_k_1
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/vd_sogi_alpha_k_2
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/vq_sogi_alpha_k_1
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/vq_sogi_alpha_k_2
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/wolp
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi/vq_sogi_alpha
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/a-b/a
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/a-b/c
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/a-b/b
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/sum/a
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/sum/c
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/sum/b
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/a-b1/a
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/a-b1/c
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/a-b1/b
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/sum1/a
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/sum1/c
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/sum1/b
- dsogi_pll_3ph/Dsogi-PLL/SC/sum/a
- dsogi_pll_3ph/Dsogi-PLL/SC/sum/c
- dsogi_pll_3ph/Dsogi-PLL/SC/sum/b
- dsogi_pll_3ph/Dsogi-PLL/SC/sum1/a
- dsogi_pll_3ph/Dsogi-PLL/SC/sum1/c
- dsogi_pll_3ph/Dsogi-PLL/SC/sum1/b
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/cos_th_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/sin_th_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/th_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/th
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/sin_th
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/wo
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco/cos_th
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf/vd_park
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf/vp_alpha
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf/vq_park
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf/vp_betha
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf/sin_th_k_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf/cos_th_k_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/pi_ctrl/vq_park
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/pi_ctrl/w_pi
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/pi_ctrl/vq_park_k_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/pi_ctrl/w_pi_k_1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/sum/a
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/sum/c
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/sum/b

∧ Less
Recommended Action
Change complexity of identified data objects from 'Inherited' to 'On' or 'Off'.

Check MATLAB Function metrics

Identify MATLAB Functions that violate code and complexity metrics.
Warning
The following MATLAB Function blocks were found to violate code and complexity metrics:

Block Path | Expression | Description
--- | --- | ---
..../Dsogi-PLL/Clark Transform/clark_trafo | function [valpha,vbetha] = clarktrans(va,vb,vc)... | Density of Comments = 0. Density of Comments should be greater than 0.2.
..../Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi | function [vd_sogi_alpha,vq_sogi_alpha] = sogi(v_ct_alpha,v_ct_alpha_k_1,v_ct_alpha_k_2,vd_sogi_alpha_k_1,vd_sogi_alpha_k_2,vq_sogi_alpha_k_1,vq_sogi_alpha_k_2,wolp)... | Density of Comments = 0. Density of Comments should be greater than 0.2.
..../Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi | function [vd_sogi_alpha,vq_sogi_alpha] = sogi(v_ct_alpha,v_ct_alpha_k_1,v_ct_alpha_k_2,vd_sogi_alpha_k_1,vd_sogi_alpha_k_2,vq_sogi_alpha_k_1,vq_sogi_alpha_k_2,wolp)... | Density of Comments = 0. Density of Comments should be greater than 0.2.
dsogi_pll_3ph/Dsogi-PLL/SC/NSC/a-b | function c = fcn(a,b)... | Density of Comments = 0. Density of Comments should be greater than 0.2.
dsogi_pll_3ph/Dsogi-PLL/SC/NSC/sum | function c = fcn(a,b)... | Density of Comments = 0. Density of Comments should be greater than 0.2.
dsogi_pll_3ph/Dsogi-PLL/SC/PSC/a-b1 | function c = fcn(a,b)... | Density of Comments = 0. Density of Comments should be greater than 0.2.
dsogi_pll_3ph/Dsogi-PLL/SC/PSC/sum1 | function c = fcn(a,b)... | Density of Comments = 0. Density of Comments should be greater than 0.2.
dsogi_pll_3ph/Dsogi-PLL/SC/sum | function c = fcn(a,b)... | Density of Comments = 0. Density of Comments should be greater than 0.2.
dsogi_pll_3ph/Dsogi-PLL/SC/sum1 | function c = fcn(a,b)... | Density of Comments = 0. Density of Comments should be greater than 0.2.
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/sum | function c = fcn(a,b)... | Density of Comments = 0. Density of Comments should be greater than 0.2.
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf | function [vd_park,vq_park] = park(vp_alpha,vp_betha,sin_th_k_1,cos_th_k_1)... | Density of Comments = 0.1. Density of Comments should be greater than 0.2.
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/pi_ctrl | function w_pi = pi_ctrl(vq_park,vq_park_k_1,w_pi_k_1)... | Density of Comments = 0.11765. Density of Comments should be greater than 0.2.
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco | function [th,sin_th,cos_th] = dco(cos_th_1,sin_th_1,th_1,wo)... | Density of Comments = 0.16667. Density of Comments should be greater than 0.2.

∧ Less
Recommended Action
Remodel the functions to meet the set code and complexity metrics

Check MATLAB Code Analyzer messages

Check MATLAB functions for %#codegen directive, MATLAB Code Analyzer messages, and justification message IDs.
Warning
The following MATLAB Function blocks were found with Code Analyzer warnings, missing %#codegen directive or inappropriate usage of justification message IDs:

Block Path | Expression | Description
--- | --- | ---
..../Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi | function [vd_sogi_alpha,vq_sogi_alpha]=sogi(v_ct_alpha,v_ct_alpha_k_1,v_ct_alpha_k_2,vd_sogi_alpha_k_1,vd_sogi_alpha_k_2,vq_sogi_alpha_k_1,vq_sogi_alpha_k_2,wolp) | INUSD : Input argument might be unused. Consider replacing the argument with ~ instead.
..../Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi | function [vd_sogi_alpha,vq_sogi_alpha]=sogi(v_ct_alpha,v_ct_alpha_k_1,v_ct_alpha_k_2,vd_sogi_alpha_k_1,vd_sogi_alpha_k_2,vq_sogi_alpha_k_1,vq_sogi_alpha_k_2,wolp) | INUSD : Input argument might be unused. Consider replacing the argument with ~ instead.

Recommended Action
Consider correcting the above mentioned warnings -

- Implement MATLAB Code Analyzer recommendations
- Justify code line with %#ok comment
- Specify justification by adding message id to %#ok comment
- For MATLAB Function files, add %#codegen directive, if missing

Check if/elseif/else patterns in MATLAB Function blocks

Identify if/elseif/else patterns without appropriate else conditions in embedded MATLAB code.
Passed
No inappropriate if/elseif/else patterns found.

Check switch statements in MATLAB Function blocks

Identify inappropriately used switch statements in embedded MATLAB code.
Passed
No inappropriately used switch statements found.

Check usage of relational operators in MATLAB Function blocks

Identify relational operators operating on operands of different data types in MATLAB Function blocks.
Passed
No relational operators found operating on operands of different data types.

Check usage of logical operators and functions in MATLAB Function blocks

Identify logical operators and functions operating on operands with numerical data types.
Passed
No logical operators or functions found operating on operands with numerical data types.

Check type and size of condition expressions

Identify condition expressions which are not logical scalars.
Passed
No condition expressions found which are not logical scalars.

Check MATLAB functions not supported for code generation

Identify MATLAB functions that are not supported for code generation.
Passed
All identified MATLAB functions are supported for code generation.

Metrics for generated code complexity

Identify usage of built-in MATLAB Functions with high code complexity.
Passed
No MATLAB constructs found with high code complexity.

1.4 Configuration 0 0 23 0 9 0
All checks hidden.

Check safety-related diagnostic settings for data store memory

Check diagnostic settings in the model configuration that apply to data store memory and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Detect read before write (ReadBeforeWriteMsg) | UseLocalSettings | EnableAllAsError
Warning | Detect write after read (WriteAfterReadMsg) | UseLocalSettings | EnableAllAsError
Warning | Detect write after write (WriteAfterWriteMsg) | UseLocalSettings | EnableAllAsError
Warning | Duplicate data store names (UniqueDataStoreMsg) | none | error

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related diagnostic settings for saving

Check diagnostic settings in the model configuration that apply to saving model files.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Block diagram contains disabled library links (SaveWithDisabledLinksMsg) | warning | error
Warning | Block diagram contains parameterized library links (SaveWithParameterizedLinksMsg) | warning | error

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related model referencing settings

Check model referencing settings in the model configuration that might impact safety.
Passed
All constraints on model configuration parameters have been met.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Pass | Rebuild (UpdateModelReferenceTargets) | IfOutOfDateOrStructuralChange | AssumeUpToDate, IfOutOfDateOrStructuralChange
Pass | Pass fixed-size scalar root inputs by value for code generation (ModelReferencePassRootInputsByReference) * | on | on
Pass | Minimize algebraic loop occurrences (ModelReferenceMinAlgLoopOccurrences) | off | off

Recommended Action
* The Command-Line values provided in the table are reverse of the settings in the Configuration Parameters Dialog. Therefore, 'on' in the Command-Line corresponds to an "Off" setting in the dialog, and 'off' in the Command-Line corresponds to an "On" setting in the dialog.

Check safety-related code generation settings for comments

Check code generation settings in the model configuration that apply comments and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values | Prerequisites
--- | --- | --- | --- | ---
D - Warning | System target file (SystemTargetFile) | Non-ERT based target | ERT based target |
Warning | ReqsInCode | Prerequisite constraint not met. | on | SystemTargetFile, GenerateComments

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related code generation interface settings

Check code generation interface settings in the model configuration that might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values | Prerequisites
--- | --- | --- | --- | ---
Warning | Support non-finite numbers (SupportNonFinite) | on | off |
Warning | SupportAbsoluteTime | Prerequisite constraint not met. | off | SystemTargetFile
Warning | SupportContinuousTime | Prerequisite constraint not met. | off | SystemTargetFile
D - Warning | System target file (SystemTargetFile) | Non-ERT based target | ERT based target |
Warning | SupportNonInlinedSFcns | Prerequisite constraint not met. | off | SystemTargetFile
Warning | IncludeMdlTerminateFcn | Prerequisite constraint not met. | off | SystemTargetFile
Warning | SuppressErrorStatus | Prerequisite constraint not met. | on | SystemTargetFile

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related solver settings for simulation time

Identify if the model Start time is set to 0 and Stop time is less than the Application Life Span.
Passed
No issues found with solver settings for simulation time.

Check safety-related solver settings for solver options

Check solver settings in the model configuration that apply to solvers and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Solver (SolverName) | ode1 | FixedStepDiscrete

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related solver settings for tasking and sample-time

Check solver settings in the model configuration that apply to tasking and sample-time constraints and might impact safety.
Passed
All constraints on model configuration parameters have been met.

Status | Parameter | Current Value | Not Recommended Values
--- | --- | --- | ---
Pass | Automatically handle rate transition for data transfer (AutoInsertRateTranBlk) | off | on

Check safety-related diagnostic settings for solvers

Check diagnostic settings in the model configuration that apply to solvers and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Algebraic loop (AlgebraicLoopMsg) | warning | error
Warning | Minimize algebraic loop (ArtificialAlgebraicLoopMsg) | warning | error
Warning | Block priority violation (BlockPriorityViolationMsg) | warning | error
Warning | Automatic solver parameter selection (SolverPrmCheckMsg) | none | error
Warning | State name clash (StateNameClashWarn) | none | warning

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related diagnostic settings for sample time

Check diagnostic settings in the model configuration that apply to sample time and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Source block specifies -1 sample time (InheritedTsInSrcMsg) | warning | error
Warning | Enforce sample times specified by Signal Specification blocks (SigSpecEnsureSampleTimeMsg) | warning | error
Warning | Single task data transfer (SingleTaskRateTransMsg) | none | error
Warning | Tasks with equal priority (TasksWithSamePriorityMsg) | warning | error
Warning | Unspecified inheritability of sample time (UnknownTsInhSupMsg) | warning | error

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related optimization settings for logic signals

Check optimization settings in the model configuration that apply to logic signals and might impact safety.
Passed
All constraints on model configuration parameters have been met.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Pass | Implement logic signals as Boolean data (vs. double) (BooleanDataType) | on | on

Check safety-related block reduction optimization settings

Check block reduction optimization settings in the model configuration that might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Block reduction (BlockReduction) | on | off

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related code generation settings for code style

Check code generation settings in the model configuration that apply to code style and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values | Prerequisites
--- | --- | --- | --- | ---
Warning | ParenthesesLevel | Prerequisite constraint not met. | Maximum, Standards | SystemTargetFile
Warning | PreserveExpressionOrder | Prerequisite constraint not met. | on | SystemTargetFile
D - Warning | System target file (SystemTargetFile) | Non-ERT based target | ERT based target |

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related optimization settings for application lifespan

Check optimization settings in the model configuration that apply to application lifespan and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Application lifespan (days) (LifeSpan) | 1 | Inf

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related code generation identifier settings

Check code generation identifier settings in the model configuration that might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values | Not Recommended Values | Prerequisites
--- | --- | --- | --- | --- | ---
D - Warning | System target file (SystemTargetFile) | Non-ERT based target | ERT based target |  |
Warning | MangleLength | Prerequisite constraint not met. |  | 1, 2, 3 | SystemTargetFile

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related optimization settings for data initialization

Check optimization settings in the model configuration that apply to data initialization and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values | Prerequisites
--- | --- | --- | --- | ---
D - Warning | System target file (SystemTargetFile) | Non-ERT based target | ERT based target |
Warning | ZeroExternalMemoryAtStartup* | Prerequisite constraint not met. | on | SystemTargetFile, CodeInterfacePackaging
Warning | ZeroInternalMemoryAtStartup* | Prerequisite constraint not met. | on | SystemTargetFile, CodeInterfacePackaging

Recommended Action
Follow the links in the result table to modify the model configuration parameters.
* The Command-Line values provided in the table are reverse of the settings in the Configuration Parameters Dialog. Therefore, 'on' in the Command-Line corresponds to an "Off" setting in the dialog, and 'off' in the Command-Line corresponds to an "On" setting in the dialog.

Check safety-related optimization settings for data type conversions

Check optimization settings in the model configuration that apply to data type conversions and might impact safety.
Passed
All constraints on model configuration parameters have been met.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Pass | Remove code from floating-point to integer conversions that wraps out-of-range values (EfficientFloat2IntCast) | on | on

Check safety-related optimization settings for division arithmetic exceptions

Check optimization settings in the model configuration that apply to division arithmetic exceptions and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values | Prerequisites
--- | --- | --- | --- | ---
D - Warning | System target file (SystemTargetFile) | Non-ERT based target | ERT based target |
Warning | NoFixptDivByZeroProtection | Prerequisite constraint not met. | off | SystemTargetFile

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related optimization settings for specified minimum and maximum values

Check optimization settings in the model configuration that apply to specified minimum and maximum values and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values | Prerequisites
--- | --- | --- | --- | ---
Warning | UseSpecifiedMinMax | Prerequisite constraint not met. | off | SystemTargetFile
D - Warning | System target file (SystemTargetFile) | Non-ERT based target | ERT based target |

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related settings for hardware implementation

Check 'Byte ordering' and 'Signed integer division rounds to' parameters
Identify inconsistencies or underspecification of hardware attributes that can lead to incorrect and inefficient generated code.
Passed
Target specification is consistent.

Check whether 'Production hardware' and 'Test hardware' match
Search for 'Test hardware is the same as production hardware' in the Configuration Parameters dialog box and check if it is selected. If it is cleared, identify whether target specifications match.
Passed
'Test hardware is the same as production hardware' is selected or is cleared and the target specifications match.

Check safety-related diagnostic settings for compatibility

Check diagnostic settings in the model configuration that affect compatibility and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | S-function upgrades needed (SFcnCompatibilityMsg) | none | error

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related diagnostic settings for parameters

Check diagnostic settings in the model configuration that apply to parameters and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Detect underflow (ParameterUnderflowMsg) | none | error
Warning | Detect precision loss (ParameterPrecisionLossMsg) | warning | error
Warning | Detect loss of tunability (ParameterTunabilityLossMsg) | warning | error

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related diagnostic settings for Merge blocks

Check diagnostic settings in the model configuration that apply to Merge blocks and might impact safety.
Passed
All constraints on model configuration parameters have been met.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Pass | Detect multiple driving blocks executing at the same time step (MergeDetectMultiDrivingBlocksExec) | error | error

Check safety-related diagnostic settings for model initialization

Check diagnostic settings in the model configuration that affect model initialization and might impact safety.
Passed
All constraints on model configuration parameters have been met.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Pass | Underspecified initialization detection (UnderspecifiedInitializationDetection) | Simplified | Simplified

Check safety-related diagnostic settings for data used for debugging

Check diagnostic settings in the model configuration that apply to data used for debugging and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Model Verification block enabling (AssertControl) | UseLocalSettings | DisableAll

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related diagnostic settings for signal connectivity

Check diagnostic settings in the model configuration that apply to signal connectivity and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Signal label mismatch (SignalLabelMismatchMsg) | none | error
Warning | Unconnected block input ports (UnconnectedInputMsg) | none | error
Warning | Unconnected block output ports (UnconnectedOutputMsg) | none | error
Warning | Unconnected line (UnconnectedLineMsg) | none | error

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related diagnostic settings for bus connectivity

Check diagnostic settings in the model configuration that apply to bus connectivity and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Unspecified bus object at root Outport block (RootOutportRequireBusObject) | warning | error
Warning | Element name mismatch (BusObjectLabelMismatch) | warning | error
Warning | Bus signal treated as vector (StrictBusMsg) | ErrorLevel1 | ErrorOnBusTreatedAsVector
Warning | Non-bus signals treated as bus signals (NonBusSignalsTreatedAsBus) | none | error

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related diagnostic settings that apply to function-call connectivity

Check diagnostic settings in the model configuration that apply to function-call connectivity and might impact safety.
Passed
All constraints on model configuration parameters have been met.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Pass | InvalidFcnCallConnMsg | error | error
Pass | Context-dependent inputs (FcnCallInpInsideContextMsg) | error | error

Check safety-related diagnostic settings for type conversions

Check diagnostic settings in the model configuration that apply to type conversions and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Unnecessary type conversions (UnnecessaryDatatypeConvMsg) | none | warning
Warning | Vector/matrix block input conversion (VectorMatrixConversionMsg) | none | error

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related diagnostic settings for model referencing

Check diagnostic settings in the model configuration that apply to model referencing and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Port and parameter mismatch (ModelReferenceIOMismatchMessage) | none | error
Warning | Invalid root Inport/Outport block connection (ModelReferenceIOMsg) | none | error
Warning | Unsupported data logging (ModelReferenceDataLoggingMessage) | warning | error

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related diagnostic settings for Stateflow

Check diagnostic settings in the model configuration that apply to Stateflow and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Invalid input data access in chart initialization (SFInvalidInputDataAccessInChartInitDiag) | warning | error
Warning | Transition outside natural parent (SFTransitionOutsideNaturalParentDiag) | warning | error
Warning | Unreachable execution path (SFUnreachableExecutionPathDiag) | warning | error
Warning | Undirected event broadcasts (SFUndirectedBroadcastEventsDiag) | warning | error
Warning | Transition action specified before condition action (SFTransitionActionBeforeConditionDiag) | warning | error
Warning | Absolute time temporal value shorter than sampling period (SFTemporalDelaySmallerThanSampleTimeDiag) | warning | error
Warning | Self-transition on leaf state (SFSelfTransitionDiag) | warning | error
Warning | 'Execute-at-initialization' disabled in presence of input events (SFExecutionAtInitializationDiag) | warning | error

Recommended Action
Follow the links in the result table to modify the model configuration parameters.

Check safety-related diagnostic settings for signal data

Check diagnostic settings in the model configuration that apply to signal data and might impact safety.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values
--- | --- | --- | ---
Warning | Division by singular matrix (CheckMatrixSingularityMsg) | none | error
Warning | Underspecified data types (UnderSpecifiedDataTypeMsg) | none | error
Warning | Wrap on overflow (IntegerOverflowMsg) | warning | error
Warning | Saturate on overflow (IntegerSaturationMsg) | warning | error
Warning | Inf or NaN block output (SignalInfNanChecking) | none | error
Warning | Simulation range checking (SignalRangeChecking) | warning | error

Recommended Action
Follow the links in the result table to modify the model configuration parameters.
1.5 Naming 0 0 1 0 1 0
All checks hidden.

Check model file name

Identify inappropriate characters and length issues in model file name.
Passed
No issues found with model file name.

Check model object names

Check Signal names
Identify invalid names of Signals
Warning
Contains prohibited characters

Signal | Issue
--- | ---
V betha | V betha
V alpha | V alpha
Phase C | Phase C
Phase B | Phase B
Phase A | Phase A

Recommended Action
Change flagged names of signals
_________________________________________________________________________________________

Check Block names
Identify invalid names of Blocks
Warning
Contains prohibited characters

Block Path | Expression
--- | ---
dsogi_pll_3ph/Dsogi-PLL | Dsogi-PLL
dsogi_pll_3ph/Dsogi-PLL/Clark Transform | Clark Transform
..../Dsogi-PLL/Clark Transform/V alpha | V alpha
..../Dsogi-PLL/Clark Transform/V betha | V betha
dsogi_pll_3ph/Dsogi-PLL/DSOGI/V alpha | V alpha
dsogi_pll_3ph/Dsogi-PLL/DSOGI/V betha | V betha
..../Dsogi-PLL/DSOGI/Dsogi alpha | Dsogi alpha
..../Dsogi-PLL/DSOGI/Dsogi alpha/V alpha | V alpha
..../Dsogi-PLL/DSOGI/Dsogi alpha1 | Dsogi alpha1
..../Dsogi-PLL/DSOGI/Dsogi alpha1/V betha | V betha
dsogi_pll_3ph/Dsogi-PLL/SC/NSC/a-b | a-b
dsogi_pll_3ph/Dsogi-PLL/SC/PSC/a-b1 | a-b1
..../Dsogi-PLL/SRF_PLL/Data Type Conversion | Data Type Conversion
..../Dsogi-PLL/SRF_PLL/Data Type Conversion1 | Data Type Conversion1
..../Dsogi-PLL/SRF_PLL/Data Type Conversion2 | Data Type Conversion2
..../Dsogi-PLL/SRF_PLL/Data Type Conversion3 | Data Type Conversion3
..../Dsogi-PLL/SRF_PLL/Phase Swap | Phase Swap
dsogi_pll_3ph/Phase A | Phase A
dsogi_pll_3ph/Phase B | Phase B
dsogi_pll_3ph/Phase C | Phase C
dsogi_pll_3ph/Rate Transition3 | Rate Transition3

∧ Less
Recommended Action
Change flagged names of blocks
_________________________________________________________________________________________

Check Block names
Identify invalid names of Blocks
Warning
Contains more than 32 characters, Contains prohibited characters

Block Path | Expression
--- | ---
..../Low-Pass Filter (Discrete or Continuous) | Low-Pass Filter (Discrete or Continuous)

Recommended Action
Change flagged names of blocks
1.6 Requirements 0 0 1 0 0 0
All checks hidden.

Check for model elements that do not link to requirements

Check for model elements that do not link to a requirements document.
Warning
The following MATLAB functions do not link to a requirements document:

Block Path | Expression
--- | ---
..../Dsogi-PLL/Clark Transform/clark_trafo | function [valpha,vbetha] = clarktrans(va,vb,vc)...
..../Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi | function [vd_sogi_alpha,vq_sogi_alpha] = sogi(v_ct_alpha,v_ct_alpha_k_1,v_ct_alpha_k_2,vd_sogi_alpha_k_1,vd_sogi_alpha_k_2,vq_sogi_alpha_k_1,vq_sogi_alpha_k_2,wolp)...
..../Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi | function [vd_sogi_alpha,vq_sogi_alpha] = sogi(v_ct_alpha,v_ct_alpha_k_1,v_ct_alpha_k_2,vd_sogi_alpha_k_1,vd_sogi_alpha_k_2,vq_sogi_alpha_k_1,vq_sogi_alpha_k_2,wolp)...
dsogi_pll_3ph/Dsogi-PLL/SC/PSC/a-b1 | function c = fcn(a,b)...
dsogi_pll_3ph/Dsogi-PLL/SC/PSC/sum1 | function c = fcn(a,b)...
dsogi_pll_3ph/Dsogi-PLL/SC/NSC/sum | function c = fcn(a,b)...
dsogi_pll_3ph/Dsogi-PLL/SC/NSC/a-b | function c = fcn(a,b)...
dsogi_pll_3ph/Dsogi-PLL/SC/sum | function c = fcn(a,b)...
dsogi_pll_3ph/Dsogi-PLL/SC/sum1 | function c = fcn(a,b)...
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf | function [vd_park,vq_park] = park(vp_alpha,vp_betha,sin_th_k_1,cos_th_k_1)...
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/pi_ctrl | function w_pi = pi_ctrl(vq_park,vq_park_k_1,w_pi_k_1)...
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/sum | function c = fcn(a,b)...
dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco | function [th,sin_th,cos_th] = dco(cos_th_1,sin_th_1,th_1,wo)...

∧ Less
Recommended Action
For each MATLAB function in the list, right-click the function declaration, select `Requirements`, and specify a requirement.
Check the Traceability Matrix for viewing requirements and their links to blocks in Simulink model in a compact format
_________________________________________________________________________________________

Check for model elements that do not link to a requirements document.
Warning
The following model elements do not link to a requirements document:

- dsogi_pll_3ph
- dsogi_pll_3ph/Dsogi-PLL/SC
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC
- dsogi_pll_3ph/Dsogi-PLL/Clark Transform
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/Phase Swap
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/Phase Swap/Subsystem
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/Phase Swap/Subsystem1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/Phase Swap/Subsystem2
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/Cos
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/Sin
- dsogi_pll_3ph/Dsogi-PLL/Clark Transform/clark_trafo
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha/alpha_sogi
- dsogi_pll_3ph/Dsogi-PLL/DSOGI/Dsogi alpha1/alpha_sogi
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/a-b1
- dsogi_pll_3ph/Dsogi-PLL/SC/PSC/sum1
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/sum
- dsogi_pll_3ph/Dsogi-PLL/SC/NSC/a-b
- dsogi_pll_3ph/Dsogi-PLL/SC/sum
- dsogi_pll_3ph/Dsogi-PLL/SC/sum1
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/park_tf
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/pi_ctrl
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/sum
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL/dco
- dsogi_pll_3ph/Dsogi-PLL/SRF_PLL

∧ Less
Recommended Action
For each model element in the list, in the Model Editor, right-click the model element, select `Requirements`, and specify a requirement.
Check the Traceability Matrix for viewing requirements and their links to blocks in Simulink model in a compact format.
1.7 Code 0 0 1 0 1 0
All checks hidden.

Check for blocks not recommended for MISRA C:2012

Passed

Check configuration parameters for MISRA C:2012

Identify configuration parameters that might impact MISRA C:2012 compliant code generation.
Warning
The model configuration parameters are not set to the recommended values specified in the data file.

Status | Parameter | Current Value | Recommended Values | Prerequisites
--- | --- | --- | --- | ---
Warning | Model Verification block enabling (AssertControl) | UseLocalSettings | DisableAll |
D - Warning | Shared code placement (UtilityFuncGeneration) | Auto | Shared location |
Warning | Generate shared constants (GenerateSharedConstants) | Prerequisite constraint not met. | off | UtilityFuncGeneration
D - Warning | System target file (SystemTargetFile) | Non-ERT based target | ERT based target |
Warning | SupportContinuousTime | Prerequisite constraint not met. | off | SystemTargetFile
Warning | SupportNonInlinedSFcns | Prerequisite constraint not met. | off | SystemTargetFile
Warning | ParenthesesLevel | Prerequisite constraint not met. | Standards, Maximum | SystemTargetFile
Warning | SuppressUnreachableDefaultCases | Parameter is inactive! Enable parameter or modify dependent parameter value. | off |
Warning | CastingMode | Prerequisite constraint not met. | Standards | SystemTargetFile
Warning | InternalIdentifier | Prerequisite constraint not met. | Shortened | SystemTargetFile
Warning | EnableSignedLeftShifts | Prerequisite constraint not met. | off | SystemTargetFile
Warning | EnableSignedRightShifts | Prerequisite constraint not met. | off | SystemTargetFile
Warning | Inf or NaN block output (SignalInfNanChecking) | none | warning |
Warning | Undirected event broadcasts (SFUndirectedBroadcastEventsDiag) | warning | error |
Warning | Compile-time recursion limit for MATLAB functions (CompileTimeRecursionLimit) | 50 | 0 |
Warning | Enable run-time recursion for MATLAB functions (EnableRuntimeRecursion) | on | off |
Warning | MATLABFcnDesc | Prerequisite constraint not met. | on | GenerateComments, SystemTargetFile
Warning | Leverage target hardware instruction set extensions (InstructionSetExtensions) | SSE2 | None |

∧ Less
Recommended Action
Modify the configuration parameters listed above to the recommended values.