REM file: simulate_mti.bat
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# set up the working directory
set work work
vlib work

REM compile all of the files
vlog -work work %XILINX%\verilog\src\glbl.v
vlog -work work ..\..\implement\results\routed.v
vlog -work work pll_controller_tb.v

REM run the simulation
vsim -c -t ps +transport_int_delays -voptargs="+acc" -L secureip -L simprims_ver -sdfmax pll_controller_tb\dut=..\..\implement\results\routed.sdf +no_notifier work.pll_controller_tb work.glbl
