v2.0.0
i2c.h
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1/*
2 * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef _HARDWARE_I2C_H
8#define _HARDWARE_I2C_H
9
10#include "pico.h"
11#include "pico/time.h"
12#include "hardware/structs/i2c.h"
13#include "hardware/regs/dreq.h"
14
15// PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_HARDWARE_I2C, Enable/disable assertions in the hardware_i2c module, type=bool, default=0, group=hardware_i2c
16#ifndef PARAM_ASSERTIONS_ENABLED_HARDWARE_I2C
17#ifdef PARAM_ASSERTIONS_ENABLED_I2C // backwards compatibility with SDK < 2.0.0
18#define PARAM_ASSERTIONS_ENABLED_HARDWARE_I2C PARAM_ASSERTIONS_ENABLED_I2C
19#else
20#define PARAM_ASSERTIONS_ENABLED_HARDWARE_I2C 0
21#endif
22#endif
23#ifdef __cplusplus
24extern "C" {
25#endif
26
55typedef struct i2c_inst i2c_inst_t;
56
57// PICO_CONFIG: PICO_DEFAULT_I2C, Define the default I2C for a board, min=0, max=1, default=Usually provided via board header, group=hardware_i2c
58// PICO_CONFIG: PICO_DEFAULT_I2C_SDA_PIN, Define the default I2C SDA pin, min=0, max=29, default=Usually provided via board header, group=hardware_i2c
59// PICO_CONFIG: PICO_DEFAULT_I2C_SCL_PIN, Define the default I2C SCL pin, min=0, max=29, default=Usually provided via board header, group=hardware_i2c
60
68extern i2c_inst_t i2c0_inst;
69extern i2c_inst_t i2c1_inst;
70
71#define i2c0 (&i2c0_inst)
72#define i2c1 (&i2c1_inst)
73
74#if !defined(PICO_DEFAULT_I2C_INSTANCE) && defined(PICO_DEFAULT_I2C)
75#define PICO_DEFAULT_I2C_INSTANCE() (__CONCAT(i2c,PICO_DEFAULT_I2C))
76#endif
77
91#ifdef PICO_DEFAULT_I2C_INSTANCE
92#define i2c_default PICO_DEFAULT_I2C_INSTANCE()
93#endif
94
97// ----------------------------------------------------------------------------
98// Setup
99
114uint i2c_init(i2c_inst_t *i2c, uint baudrate);
115
124void i2c_deinit(i2c_inst_t *i2c);
125
137uint i2c_set_baudrate(i2c_inst_t *i2c, uint baudrate);
138
146void i2c_set_slave_mode(i2c_inst_t *i2c, bool slave, uint8_t addr);
147
148// ----------------------------------------------------------------------------
149// Generic input/output
150
151 struct i2c_inst {
152 i2c_hw_t *hw;
153 bool restart_on_next;
154};
155
164#ifndef I2C_NUM
165static_assert(NUM_I2CS == 2, "");
166#define I2C_NUM(i2c) ((i2c) == i2c1)
167#endif
168
177#ifndef I2C_INSTANCE
178static_assert(NUM_I2CS == 2, "");
179#define I2C_INSTANCE(num) ((num) ? i2c1 : i2c0)
180#endif
181
191#ifndef I2C_DREQ_NUM
192static_assert(DREQ_I2C0_RX == DREQ_I2C0_TX + 1, "");
193static_assert(DREQ_I2C1_RX == DREQ_I2C1_TX + 1, "");
194static_assert(DREQ_I2C1_TX == DREQ_I2C0_TX + 2, "");
195#define I2C_DREQ_NUM(i2c,is_tx) (DREQ_I2C0_TX + I2C_NUM(i2c) * 2 + !(is_tx))
196#endif
197
204 static inline uint i2c_get_index(i2c_inst_t *i2c) {
205 invalid_params_if(HARDWARE_I2C, i2c != i2c0 && i2c != i2c1);
206 return I2C_NUM(i2c);
207}
208
209// backward compatibility
210#define i2c_hw_index(i2c) i2c_get_index(i2c)
211
218 static inline i2c_hw_t *i2c_get_hw(i2c_inst_t *i2c) {
219 i2c_hw_index(i2c); // check it is a hw i2c
220 return i2c->hw;
221}
222
229 static inline i2c_inst_t *i2c_get_instance(uint num) {
230 invalid_params_if(HARDWARE_I2C, num >= NUM_I2CS);
231 return I2C_INSTANCE(num);
232}
233
249int i2c_write_blocking_until(i2c_inst_t *i2c, uint8_t addr, const uint8_t *src, size_t len, bool nostop, absolute_time_t until);
250
263int i2c_read_blocking_until(i2c_inst_t *i2c, uint8_t addr, uint8_t *dst, size_t len, bool nostop, absolute_time_t until);
264
280 static inline int i2c_write_timeout_us(i2c_inst_t *i2c, uint8_t addr, const uint8_t *src, size_t len, bool nostop, uint timeout_us) {
281 absolute_time_t t = make_timeout_time_us(timeout_us);
282 return i2c_write_blocking_until(i2c, addr, src, len, nostop, t);
283}
284
285int i2c_write_timeout_per_char_us(i2c_inst_t *i2c, uint8_t addr, const uint8_t *src, size_t len, bool nostop, uint timeout_per_char_us);
286
299 static inline int i2c_read_timeout_us(i2c_inst_t *i2c, uint8_t addr, uint8_t *dst, size_t len, bool nostop, uint timeout_us) {
300 absolute_time_t t = make_timeout_time_us(timeout_us);
301 return i2c_read_blocking_until(i2c, addr, dst, len, nostop, t);
302}
303
304int i2c_read_timeout_per_char_us(i2c_inst_t *i2c, uint8_t addr, uint8_t *dst, size_t len, bool nostop, uint timeout_per_char_us);
305
317int i2c_write_blocking(i2c_inst_t *i2c, uint8_t addr, const uint8_t *src, size_t len, bool nostop);
318
330int i2c_read_blocking(i2c_inst_t *i2c, uint8_t addr, uint8_t *dst, size_t len, bool nostop);
331
332
340 static inline size_t i2c_get_write_available(i2c_inst_t *i2c) {
341 const size_t IC_TX_BUFFER_DEPTH = 16;
342 return IC_TX_BUFFER_DEPTH - i2c_get_hw(i2c)->txflr;
343}
344
352 static inline size_t i2c_get_read_available(i2c_inst_t *i2c) {
353 return i2c_get_hw(i2c)->rxflr;
354}
355
366 static inline void i2c_write_raw_blocking(i2c_inst_t *i2c, const uint8_t *src, size_t len) {
367 for (size_t i = 0; i < len; ++i) {
368 // TODO NACK or STOP on end?
369 while (!i2c_get_write_available(i2c))
370 tight_loop_contents();
371 i2c_get_hw(i2c)->data_cmd = *src++;
372 }
373}
374
385 static inline void i2c_read_raw_blocking(i2c_inst_t *i2c, uint8_t *dst, size_t len) {
386 for (size_t i = 0; i < len; ++i) {
387 while (!i2c_get_read_available(i2c))
388 tight_loop_contents();
389 *dst++ = (uint8_t)i2c_get_hw(i2c)->data_cmd;
390 }
391}
392
402 static inline uint8_t i2c_read_byte_raw(i2c_inst_t *i2c) {
403 i2c_hw_t *hw = i2c_get_hw(i2c);
404 assert(hw->status & I2C_IC_STATUS_RFNE_BITS); // Rx FIFO must not be empty
405 return (uint8_t)hw->data_cmd;
406}
407
417 static inline void i2c_write_byte_raw(i2c_inst_t *i2c, uint8_t value) {
418 i2c_hw_t *hw = i2c_get_hw(i2c);
419 assert(hw->status & I2C_IC_STATUS_TFNF_BITS); // Tx FIFO must not be full
420 hw->data_cmd = value;
421}
422
429 static inline uint i2c_get_dreq(i2c_inst_t *i2c, bool is_tx) {
430 return I2C_DREQ_NUM(i2c, is_tx);
431}
432
433#ifdef __cplusplus
434}
435#endif
436
437#endif
time.h
DREQ_I2C1_RX
@ DREQ_I2C1_RX
Select I2C1's RX FIFO as DREQ.
Definition: dreq.h:129
DREQ_I2C0_RX
@ DREQ_I2C0_RX
Select I2C0's RX FIFO as DREQ.
Definition: dreq.h:127
DREQ_I2C1_TX
@ DREQ_I2C1_TX
Select I2C1's TX FIFO as DREQ.
Definition: dreq.h:128
DREQ_I2C0_TX
@ DREQ_I2C0_TX
Select I2C0's TX FIFO as DREQ.
Definition: dreq.h:126
i2c_write_timeout_us
static int i2c_write_timeout_us(i2c_inst_t *i2c, uint8_t addr, const uint8_t *src, size_t len, bool nostop, uint timeout_us)
Attempt to write specified number of bytes to address, with timeout.
Definition: i2c.h:280
I2C_NUM
#define I2C_NUM(i2c)
Returns the I2C number for a I2C instance.
Definition: i2c.h:166
i2c_read_blocking_until
int i2c_read_blocking_until(i2c_inst_t *i2c, uint8_t addr, uint8_t *dst, size_t len, bool nostop, absolute_time_t until)
Attempt to read specified number of bytes from address, blocking until the specified absolute time is...
Definition: i2c.c:333
i2c_get_instance
static i2c_inst_t * i2c_get_instance(uint num)
Convert I2C hardware instance number to I2C instance.
Definition: i2c.h:229
i2c_deinit
void i2c_deinit(i2c_inst_t *i2c)
Disable the I2C HW block.
Definition: i2c.c:58
i2c_set_slave_mode
void i2c_set_slave_mode(i2c_inst_t *i2c, bool slave, uint8_t addr)
Set I2C port to slave mode.
Definition: i2c.c:112
i2c_write_blocking
int i2c_write_blocking(i2c_inst_t *i2c, uint8_t addr, const uint8_t *src, size_t len, bool nostop)
Attempt to write specified number of bytes to address, blocking.
Definition: i2c.c:245
i2c0_inst
i2c_inst_t i2c0_inst
Definition: i2c.c:15
i2c_get_read_available
static size_t i2c_get_read_available(i2c_inst_t *i2c)
Determine number of bytes received.
Definition: i2c.h:352
i2c_set_baudrate
uint i2c_set_baudrate(i2c_inst_t *i2c, uint baudrate)
Set I2C baudrate.
Definition: i2c.c:62
I2C_DREQ_NUM
#define I2C_DREQ_NUM(i2c, is_tx)
Returns the dreq_num_t used for pacing DMA transfers to or from this I2C instance....
Definition: i2c.h:195
i2c_get_write_available
static size_t i2c_get_write_available(i2c_inst_t *i2c)
Determine non-blocking write space available.
Definition: i2c.h:340
i2c_read_timeout_us
static int i2c_read_timeout_us(i2c_inst_t *i2c, uint8_t addr, uint8_t *dst, size_t len, bool nostop, uint timeout_us)
Attempt to read specified number of bytes from address, with timeout.
Definition: i2c.h:299
i2c_write_byte_raw
static void i2c_write_byte_raw(i2c_inst_t *i2c, uint8_t value)
Push a byte into I2C Tx FIFO.
Definition: i2c.h:417
I2C_INSTANCE
#define I2C_INSTANCE(num)
Returns the I2C instance with the given I2C number.
Definition: i2c.h:179
i2c_get_index
static uint i2c_get_index(i2c_inst_t *i2c)
Convert I2C instance to hardware instance number.
Definition: i2c.h:204
i2c_read_byte_raw
static uint8_t i2c_read_byte_raw(i2c_inst_t *i2c)
Pop a byte from I2C Rx FIFO.
Definition: i2c.h:402
i2c_read_blocking
int i2c_read_blocking(i2c_inst_t *i2c, uint8_t addr, uint8_t *dst, size_t len, bool nostop)
Attempt to read specified number of bytes from address, blocking.
Definition: i2c.c:329
i2c_read_raw_blocking
static void i2c_read_raw_blocking(i2c_inst_t *i2c, uint8_t *dst, size_t len)
Read direct from RX FIFO.
Definition: i2c.h:385
i2c_get_dreq
static uint i2c_get_dreq(i2c_inst_t *i2c, bool is_tx)
Return the DREQ to use for pacing transfers to/from a particular I2C instance.
Definition: i2c.h:429
i2c_init
uint i2c_init(i2c_inst_t *i2c, uint baudrate)
Initialise the I2C HW block.
Definition: i2c.c:32
i2c_write_raw_blocking
static void i2c_write_raw_blocking(i2c_inst_t *i2c, const uint8_t *src, size_t len)
Write direct to TX FIFO.
Definition: i2c.h:366
i2c_get_hw
static i2c_hw_t * i2c_get_hw(i2c_inst_t *i2c)
Return pointer to structure containing i2c hardware registers.
Definition: i2c.h:218
i2c_write_blocking_until
int i2c_write_blocking_until(i2c_inst_t *i2c, uint8_t addr, const uint8_t *src, size_t len, bool nostop, absolute_time_t until)
Attempt to write specified number of bytes to address, blocking until the specified absolute time is ...
Definition: i2c.c:249
tight_loop_contents
static __force_inline void tight_loop_contents(void)
No-op function for the body of tight loops.
Definition: platform.h:67
make_timeout_time_us
static absolute_time_t make_timeout_time_us(uint64_t us)
Convenience method to get the timestamp a number of microseconds from the current time.
Definition: time.h:136
absolute_time_t
uint64_t absolute_time_t
An opaque 64 bit timestamp in microseconds.
Definition: types.h:43
pico.h
i2c0
#define i2c0
Identifier for I2C HW Block 0.
Definition: i2c.h:71
i2c1
#define i2c1
Identifier for I2C HW Block 1.
Definition: i2c.h:72
i2c_hw_t
Definition: i2c.h:26
i2c_inst
Definition: i2c.h:151