v2.0.0-develop
busctrl.h
1// THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
2
8#ifndef _HARDWARE_STRUCTS_BUSCTRL_H
9#define _HARDWARE_STRUCTS_BUSCTRL_H
10
11#include "hardware/address_mapped.h"
12#include "hardware/regs/busctrl.h"
13
14// Reference to datasheet: https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf#tab-registerlist_busctrl
15//
16// The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature)
17// _REG_(x) will link to the corresponding register in hardware/regs/busctrl.h.
18//
19// Bit-field descriptions are of the form:
20// BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION
21enum bus_ctrl_perf_counter {
22 arbiter_rom_perf_event_access = 19,
23 arbiter_rom_perf_event_access_contested = 18,
24 arbiter_xip_main_perf_event_access = 17,
25 arbiter_xip_main_perf_event_access_contested = 16,
26 arbiter_sram0_perf_event_access = 15,
27 arbiter_sram0_perf_event_access_contested = 14,
28 arbiter_sram1_perf_event_access = 13,
29 arbiter_sram1_perf_event_access_contested = 12,
30 arbiter_sram2_perf_event_access = 11,
31 arbiter_sram2_perf_event_access_contested = 10,
32 arbiter_sram3_perf_event_access = 9,
33 arbiter_sram3_perf_event_access_contested = 8,
34 arbiter_sram4_perf_event_access = 7,
35 arbiter_sram4_perf_event_access_contested = 6,
36 arbiter_sram5_perf_event_access = 5,
37 arbiter_sram5_perf_event_access_contested = 4,
38 arbiter_fastperi_perf_event_access = 3,
39 arbiter_fastperi_perf_event_access_contested = 2,
40 arbiter_apb_perf_event_access = 1,
41 arbiter_apb_perf_event_access_contested = 0
42};
43
44 typedef struct {
45 _REG_(BUSCTRL_PERFCTR0_OFFSET) // BUSCTRL_PERFCTR0
46 // Bus fabric performance counter 0
47 // 0x00ffffff [23:0] PERFCTR0 (0x000000) Busfabric saturating performance counter 0 +
48 io_rw_32 value;
49
50 _REG_(BUSCTRL_PERFSEL0_OFFSET) // BUSCTRL_PERFSEL0
51 // Bus fabric performance event select for PERFCTR0
52 // 0x0000007f [6:0] PERFSEL0 (0x1f) Select an event for PERFCTR0
53 io_rw_32 sel;
54
55} bus_ctrl_perf_hw_t;
56
57 typedef struct {
58 _REG_(BUSCTRL_BUS_PRIORITY_OFFSET) // BUSCTRL_BUS_PRIORITY
59 // Set the priority of each master for bus arbitration
60 // 0x00001000 [12] DMA_W (0) 0 - low priority, 1 - high priority
61 // 0x00000100 [8] DMA_R (0) 0 - low priority, 1 - high priority
62 // 0x00000010 [4] PROC1 (0) 0 - low priority, 1 - high priority
63 // 0x00000001 [0] PROC0 (0) 0 - low priority, 1 - high priority
64 io_rw_32 priority;
65
66 _REG_(BUSCTRL_BUS_PRIORITY_ACK_OFFSET) // BUSCTRL_BUS_PRIORITY_ACK
67 // Bus priority acknowledge
68 // 0x00000001 [0] BUS_PRIORITY_ACK (0) Goes to 1 once all arbiters have registered the new...
69 io_ro_32 priority_ack;
70
71 _REG_(BUSCTRL_PERFCTR_EN_OFFSET) // BUSCTRL_PERFCTR_EN
72 // Enable the performance counters
73 // 0x00000001 [0] PERFCTR_EN (0)
74 io_rw_32 perfctr_en;
75
76 bus_ctrl_perf_hw_t counter[4];
77
78} busctrl_hw_t;
79
80#define busctrl_hw ((busctrl_hw_t *)BUSCTRL_BASE)
81static_assert(sizeof (busctrl_hw_t) == 0x002c, "");
82
83#endif // _HARDWARE_STRUCTS_BUSCTRL_H
84
address_mapped.h
bus_ctrl_perf_hw_t
Definition: busctrl.h:44
busctrl_hw_t
Definition: busctrl.h:57