v2.0.0
Typedefs | Enumerations | Functions
hardware_gpio
Hardware APIs

General Purpose Input/Output (GPIO) API. More...

## Typedefs
typedef enum gpio_function_rp2040 | gpio_function_t
| GPIO pin function selectors on RP2040 (used as typedef gpio_function_t)
typedef enum gpio_function_rp2350 | gpio_function_t
| GPIO pin function selectors on RP2350 (used as typedef gpio_function_t)
typedef void(* | gpio_irq_callback_t) (uint gpio, uint32_t event_mask)

## Enumerations
enum | gpio_function_rp2040 { GPIO_FUNC_XIP = 0 , GPIO_FUNC_SPI = 1 , GPIO_FUNC_UART = 2 , GPIO_FUNC_I2C = 3 , GPIO_FUNC_PWM = 4 , GPIO_FUNC_SIO = 5 , GPIO_FUNC_PIO0 = 6 , GPIO_FUNC_PIO1 = 7 , GPIO_FUNC_GPCK = 8 , GPIO_FUNC_USB = 9 , GPIO_FUNC_NULL = 0x1f }
| GPIO pin function selectors on RP2040 (used as typedef gpio_function_t) More...
enum | gpio_function_rp2350 { GPIO_FUNC_HSTX = 0 , GPIO_FUNC_SPI = 1 , GPIO_FUNC_UART = 2 , GPIO_FUNC_I2C = 3 , GPIO_FUNC_PWM = 4 , GPIO_FUNC_SIO = 5 , GPIO_FUNC_PIO0 = 6 , GPIO_FUNC_PIO1 = 7 , GPIO_FUNC_PIO2 = 8 , GPIO_FUNC_GPCK = 9 , GPIO_FUNC_XIP_CS1 = 9 , GPIO_FUNC_CORESIGHT_TRACE = 9 , GPIO_FUNC_USB = 10 , GPIO_FUNC_UART_AUX = 11 , GPIO_FUNC_NULL = 0x1f }
| GPIO pin function selectors on RP2350 (used as typedef gpio_function_t) More...
enum | gpio_irq_level { GPIO_IRQ_LEVEL_LOW = 0x1u , GPIO_IRQ_LEVEL_HIGH = 0x2u , GPIO_IRQ_EDGE_FALL = 0x4u , GPIO_IRQ_EDGE_RISE = 0x8u }
| GPIO Interrupt level definitions (GPIO events) More...
enum | gpio_slew_rate { GPIO_SLEW_RATE_SLOW = 0 , GPIO_SLEW_RATE_FAST = 1 }
| Slew rate limiting levels for GPIO outputs. More...
enum | gpio_drive_strength { GPIO_DRIVE_STRENGTH_2MA = 0 , GPIO_DRIVE_STRENGTH_4MA = 1 , GPIO_DRIVE_STRENGTH_8MA = 2 , GPIO_DRIVE_STRENGTH_12MA = 3 }
| Drive strength levels for GPIO outputs. More...

## Functions
void | gpio_set_function (uint gpio, gpio_function_t fn)
| Select GPIO function. More...
void | gpio_set_function_masked (uint32_t gpio_mask, gpio_function_t fn)
| Select the function for multiple GPIOs. More...
void | gpio_set_function_masked64 (uint64_t gpio_mask, gpio_function_t fn)
| Select the function for multiple GPIOs. More...
gpio_function_t | gpio_get_function (uint gpio)
| Determine current GPIO function. More...
void | gpio_set_pulls (uint gpio, bool up, bool down)
| Select up and down pulls on specific GPIO. More...
static void | gpio_pull_up (uint gpio)
| Set specified GPIO to be pulled up. More...
static bool | gpio_is_pulled_up (uint gpio)
| Determine if the specified GPIO is pulled up. More...
static void | gpio_pull_down (uint gpio)
| Set specified GPIO to be pulled down. More...
static bool | gpio_is_pulled_down (uint gpio)
| Determine if the specified GPIO is pulled down. More...
static void | gpio_disable_pulls (uint gpio)
| Disable pulls on specified GPIO. More...
void | gpio_set_irqover (uint gpio, uint value)
| Set GPIO IRQ override. More...
void | gpio_set_outover (uint gpio, uint value)
| Set GPIO output override. More...
void | gpio_set_inover (uint gpio, uint value)
| Select GPIO input override. More...
void | gpio_set_oeover (uint gpio, uint value)
| Select GPIO output enable override. More...
void | gpio_set_input_enabled (uint gpio, bool enabled)
| Enable GPIO input. More...
void | gpio_set_input_hysteresis_enabled (uint gpio, bool enabled)
| Enable/disable GPIO input hysteresis (Schmitt trigger) More...
bool | gpio_is_input_hysteresis_enabled (uint gpio)
| Determine whether input hysteresis is enabled on a specified GPIO. More...
void | gpio_set_slew_rate (uint gpio, enum gpio_slew_rate slew)
| Set slew rate for a specified GPIO. More...
enum gpio_slew_rate | gpio_get_slew_rate (uint gpio)
| Determine current slew rate for a specified GPIO. More...
void | gpio_set_drive_strength (uint gpio, enum gpio_drive_strength drive)
| Set drive strength for a specified GPIO. More...
enum gpio_drive_strength | gpio_get_drive_strength (uint gpio)
| Determine current drive strength for a specified GPIO. More...
void | gpio_set_irq_enabled (uint gpio, uint32_t event_mask, bool enabled)
| Enable or disable specific interrupt events for specified GPIO. More...
void | gpio_set_irq_callback (gpio_irq_callback_t callback)
| Set the generic callback used for GPIO IRQ events for the current core. More...
void | gpio_set_irq_enabled_with_callback (uint gpio, uint32_t event_mask, bool enabled, gpio_irq_callback_t callback)
| Convenience function which performs multiple GPIO IRQ related initializations. More...
void | gpio_set_dormant_irq_enabled (uint gpio, uint32_t event_mask, bool enabled)
| Enable dormant wake up interrupt for specified GPIO and events. More...
static uint32_t | gpio_get_irq_event_mask (uint gpio)
| Return the current interrupt status (pending events) for the given GPIO. More...
void | gpio_acknowledge_irq (uint gpio, uint32_t event_mask)
| Acknowledge a GPIO interrupt for the specified events on the calling core. More...
void | gpio_add_raw_irq_handler_with_order_priority_masked (uint32_t gpio_mask, irq_handler_t handler, uint8_t order_priority)
| Adds a raw GPIO IRQ handler for the specified GPIOs on the current core. More...
void | gpio_add_raw_irq_handler_with_order_priority_masked64 (uint64_t gpio_mask, irq_handler_t handler, uint8_t order_priority)
| Adds a raw GPIO IRQ handler for the specified GPIOs on the current core. More...
static void | gpio_add_raw_irq_handler_with_order_priority (uint gpio, irq_handler_t handler, uint8_t order_priority)
| Adds a raw GPIO IRQ handler for a specific GPIO on the current core. More...
void | gpio_add_raw_irq_handler_masked (uint32_t gpio_mask, irq_handler_t handler)
| Adds a raw GPIO IRQ handler for the specified GPIOs on the current core. More...
void | gpio_add_raw_irq_handler_masked64 (uint64_t gpio_mask, irq_handler_t handler)
| Adds a raw GPIO IRQ handler for the specified GPIOs on the current core. More...
static void | gpio_add_raw_irq_handler (uint gpio, irq_handler_t handler)
| Adds a raw GPIO IRQ handler for a specific GPIO on the current core. More...
void | gpio_remove_raw_irq_handler_masked (uint32_t gpio_mask, irq_handler_t handler)
| Removes a raw GPIO IRQ handler for the specified GPIOs on the current core. More...
void | gpio_remove_raw_irq_handler_masked64 (uint64_t gpio_mask, irq_handler_t handler)
| Removes a raw GPIO IRQ handler for the specified GPIOs on the current core. More...
static void | gpio_remove_raw_irq_handler (uint gpio, irq_handler_t handler)
| Removes a raw GPIO IRQ handler for the specified GPIO on the current core. More...
void | gpio_init (uint gpio)
| Initialise a GPIO for (enabled I/O and set func to GPIO_FUNC_SIO) More...
void | gpio_deinit (uint gpio)
| Resets a GPIO back to the NULL function, i.e. disables it. More...
void | gpio_init_mask (uint gpio_mask)
| Initialise multiple GPIOs (enabled I/O and set func to GPIO_FUNC_SIO) More...
static bool | gpio_get (uint gpio)
| Get state of a single specified GPIO. More...
static uint32_t | gpio_get_all (void)
| Get raw value of all GPIOs. More...
static uint64_t | gpio_get_all64 (void)
| Get raw value of all GPIOs. More...
static void | gpio_set_mask (uint32_t mask)
| Drive high every GPIO appearing in mask. More...
static void | gpio_set_mask64 (uint64_t mask)
| Drive high every GPIO appearing in mask. More...
static void | gpio_set_mask_n (uint n, uint32_t mask)
| Drive high every GPIO appearing in mask. More...
static void | gpio_clr_mask (uint32_t mask)
| Drive low every GPIO appearing in mask. More...
static void | gpio_clr_mask64 (uint64_t mask)
| Drive low every GPIO appearing in mask. More...
static void | gpio_clr_mask_n (uint n, uint32_t mask)
| Drive low every GPIO appearing in mask. More...
static void | gpio_xor_mask (uint32_t mask)
| Toggle every GPIO appearing in mask. More...
static void | gpio_xor_mask64 (uint64_t mask)
| Toggle every GPIO appearing in mask. More...
static void | gpio_xor_mask_n (uint n, uint32_t mask)
| Toggle every GPIO appearing in mask. More...
static void | gpio_put_masked (uint32_t mask, uint32_t value)
| Drive GPIOs high/low depending on parameters. More...
static void | gpio_put_masked64 (uint64_t mask, uint64_t value)
| Drive GPIOs high/low depending on parameters. More...
static void | gpio_put_masked_n (uint n, uint32_t mask, uint32_t value)
| Drive GPIOs high/low depending on parameters. More...
static void | gpio_put_all (uint32_t value)
| Drive all pins simultaneously. More...
static void | gpio_put_all64 (uint64_t value)
| Drive all pins simultaneously. More...
static void | gpio_put (uint gpio, bool value)
| Drive a single GPIO high/low. More...
static bool | gpio_get_out_level (uint gpio)
| Determine whether a GPIO is currently driven high or low. More...
static void | gpio_set_dir_out_masked (uint32_t mask)
| Set a number of GPIOs to output. More...
static void | gpio_set_dir_out_masked64 (uint64_t mask)
| Set a number of GPIOs to output. More...
static void | gpio_set_dir_in_masked (uint32_t mask)
| Set a number of GPIOs to input. More...
static void | gpio_set_dir_in_masked64 (uint64_t mask)
| Set a number of GPIOs to input. More...
static void | gpio_set_dir_masked (uint32_t mask, uint32_t value)
| Set multiple GPIO directions. More...
static void | gpio_set_dir_masked64 (uint64_t mask, uint64_t value)
| Set multiple GPIO directions. More...
static void | gpio_set_dir_all_bits (uint32_t values)
| Set direction of all pins simultaneously. More...
static void | gpio_set_dir_all_bits64 (uint64_t values)
| Set direction of all pins simultaneously. More...
static void | gpio_set_dir (uint gpio, bool out)
| Set a single GPIO direction. More...
static bool | gpio_is_dir_out (uint gpio)
| Check if a specific GPIO direction is OUT. More...
static uint | gpio_get_dir (uint gpio)
| Get a specific GPIO direction. More...

## Detailed Description

General Purpose Input/Output (GPIO) API.

RP-series microcontrollers have two banks of General Purpose Input / Output (GPIO) pins, which are assigned as follows:

All GPIOs support digital input and output, but a subset can also be used as inputs to the chip’s Analogue to Digital Converter (ADC). The allocation of GPIO pins to the ADC depends on the packaging.

RP2040 and RP2350 QFN-60 GPIO, ADC pins are 26-29. RP2350 QFN-80, ADC pins are 40-47.

Each GPIO can be controlled directly by software running on the processors, or by a number of other functional blocks.

The function allocated to each GPIO is selected by calling the gpio_set_function function.

Note
  Not all functions are available on all pins.

Each GPIO can have one function selected at a time. Likewise, each peripheral input (e.g. UART0 RX) should only be selected on one GPIO at a time. If the same peripheral input is connected to multiple GPIOs, the peripheral sees the logical OR of these GPIO inputs. Please refer to the datasheet for more information on GPIO function select.

### Function Select Table

On RP2040 the function selects are:

GPIO | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9
--- | --- | --- | --- | --- | --- | --- | --- | --- | ---
0 | SPI0 RX | UART0 TX | I2C0 SDA | PWM0 A | SIO | PIO0 | PIO1 |  | USB OVCUR DET
1 | SPI0 CSn | UART0 RX | I2C0 SCL | PWM0 B | SIO | PIO0 | PIO1 |  | USB VBUS DET
2 | SPI0 SCK | UART0 CTS | I2C1 SDA | PWM1 A | SIO | PIO0 | PIO1 |  | USB VBUS EN
3 | SPI0 TX | UART0 RTS | I2C1 SCL | PWM1 B | SIO | PIO0 | PIO1 |  | USB OVCUR DET
4 | SPI0 RX | UART1 TX | I2C0 SDA | PWM2 A | SIO | PIO0 | PIO1 |  | USB VBUS DET
5 | SPI0 CSn | UART1 RX | I2C0 SCL | PWM2 B | SIO | PIO0 | PIO1 |  | USB VBUS EN
6 | SPI0 SCK | UART1 CTS | I2C1 SDA | PWM3 A | SIO | PIO0 | PIO1 |  | USB OVCUR DET
7 | SPI0 TX | UART1 RTS | I2C1 SCL | PWM3 B | SIO | PIO0 | PIO1 |  | USB VBUS DET
8 | SPI1 RX | UART1 TX | I2C0 SDA | PWM4 A | SIO | PIO0 | PIO1 |  | USB VBUS EN
9 | SPI1 CSn | UART1 RX | I2C0 SCL | PWM4 B | SIO | PIO0 | PIO1 |  | USB OVCUR DET
10 | SPI1 SCK | UART1 CTS | I2C1 SDA | PWM5 A | SIO | PIO0 | PIO1 |  | USB VBUS DET
11 | SPI1 TX | UART1 RTS | I2C1 SCL | PWM5 B | SIO | PIO0 | PIO1 |  | USB VBUS EN
12 | SPI1 RX | UART0 TX | I2C0 SDA | PWM6 A | SIO | PIO0 | PIO1 |  | USB OVCUR DET
13 | SPI1 CSn | UART0 RX | I2C0 SCL | PWM6 B | SIO | PIO0 | PIO1 |  | USB VBUS DET
14 | SPI1 SCK | UART0 CTS | I2C1 SDA | PWM7 A | SIO | PIO0 | PIO1 |  | USB VBUS EN
15 | SPI1 TX | UART0 RTS | I2C1 SCL | PWM7 B | SIO | PIO0 | PIO1 |  | USB OVCUR DET
16 | SPI0 RX | UART0 TX | I2C0 SDA | PWM0 A | SIO | PIO0 | PIO1 |  | USB VBUS DET
17 | SPI0 CSn | UART0 RX | I2C0 SCL | PWM0 B | SIO | PIO0 | PIO1 |  | USB VBUS EN
18 | SPI0 SCK | UART0 CTS | I2C1 SDA | PWM1 A | SIO | PIO0 | PIO1 |  | USB OVCUR DET
19 | SPI0 TX | UART0 RTS | I2C1 SCL | PWM1 B | SIO | PIO0 | PIO1 |  | USB VBUS DET
20 | SPI0 RX | UART1 TX | I2C0 SDA | PWM2 A | SIO | PIO0 | PIO1 | CLOCK GPIN0 | USB VBUS EN
21 | SPI0 CSn | UART1 RX | I2C0 SCL | PWM2 B | SIO | PIO0 | PIO1 | CLOCK GPOUT0 | USB OVCUR DET
22 | SPI0 SCK | UART1 CTS | I2C1 SDA | PWM3 A | SIO | PIO0 | PIO1 | CLOCK GPIN1 | USB VBUS DET
23 | SPI0 TX | UART1 RTS | I2C1 SCL | PWM3 B | SIO | PIO0 | PIO1 | CLOCK GPOUT1 | USB VBUS EN
24 | SPI1 RX | UART1 TX | I2C0 SDA | PWM4 A | SIO | PIO0 | PIO1 | CLOCK GPOUT2 | USB OVCUR DET
25 | SPI1 CSn | UART1 RX | I2C0 SCL | PWM4 B | SIO | PIO0 | PIO1 | CLOCK GPOUT3 | USB VBUS DET
26 | SPI1 SCK | UART1 CTS | I2C1 SDA | PWM5 A | SIO | PIO0 | PIO1 |  | USB VBUS EN
27 | SPI1 TX | UART1 RTS | I2C1 SCL | PWM5 B | SIO | PIO0 | PIO1 |  | USB OVCUR DET
28 | SPI1 RX | UART0 TX | I2C0 SDA | PWM6 A | SIO | PIO0 | PIO1 |  | USB VBUS DET
29 | SPI1 CSn | UART0 RX | I2C0 SCL | PWM6 B | SIO | PIO0 | PIO1 |  | USB VBUS EN

On RP2350 the function selects are:

GPIO | F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11
--- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | ---
0 |  | SPI0 RX | UART0 TX | I2C0 SDA | PWM0 A | SIO | PIO0 | PIO1 | PIO2 | XIP_CS1n | USB OVCUR DET |
1 |  | SPI0 CSn | UART0 RX | I2C0 SCL | PWM0 B | SIO | PIO0 | PIO1 | PIO2 | TRACECLK | USB VBUS DET |
2 |  | SPI0 SCK | UART0 CTS | I2C1 SDA | PWM1 A | SIO | PIO0 | PIO1 | PIO2 | TRACEDATA0 | USB VBUS EN | UART0 TX
3 |  | SPI0 TX | UART0 RTS | I2C1 SCL | PWM1 B | SIO | PIO0 | PIO1 | PIO2 | TRACEDATA1 | USB OVCUR DET | UART0 RX
4 |  | SPI0 RX | UART1 TX | I2C0 SDA | PWM2 A | SIO | PIO0 | PIO1 | PIO2 | TRACEDATA2 | USB VBUS DET |
5 |  | SPI0 CSn | UART1 RX | I2C0 SCL | PWM2 B | SIO | PIO0 | PIO1 | PIO2 | TRACEDATA3 | USB VBUS EN |
6 |  | SPI0 SCK | UART1 CTS | I2C1 SDA | PWM3 A | SIO | PIO0 | PIO1 | PIO2 |  | USB OVCUR DET | UART1 TX
7 |  | SPI0 TX | UART1 RTS | I2C1 SCL | PWM3 B | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS DET | UART1 RX
8 |  | SPI1 RX | UART1 TX | I2C0 SDA | PWM4 A | SIO | PIO0 | PIO1 | PIO2 | XIP_CS1n | USB VBUS EN |
9 |  | SPI1 CSn | UART1 RX | I2C0 SCL | PWM4 B | SIO | PIO0 | PIO1 | PIO2 |  | USB OVCUR DET |
10 |  | SPI1 SCK | UART1 CTS | I2C1 SDA | PWM5 A | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS DET | UART1 TX
11 |  | SPI1 TX | UART1 RTS | I2C1 SCL | PWM5 B | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS EN | UART1 RX
12 | HSTX | SPI1 RX | UART0 TX | I2C0 SDA | PWM6 A | SIO | PIO0 | PIO1 | PIO2 | CLOCK GPIN0 | USB OVCUR DET |
13 | HSTX | SPI1 CSn | UART0 RX | I2C0 SCL | PWM6 B | SIO | PIO0 | PIO1 | PIO2 | CLOCK GPOUT0 | USB VBUS DET |
14 | HSTX | SPI1 SCK | UART0 CTS | I2C1 SDA | PWM7 A | SIO | PIO0 | PIO1 | PIO2 | CLOCK GPIN1 | USB VBUS EN | UART0 TX
15 | HSTX | SPI1 TX | UART0 RTS | I2C1 SCL | PWM7 B | SIO | PIO0 | PIO1 | PIO2 | CLOCK GPOUT1 | USB OVCUR DET | UART0 RX
16 | HSTX | SPI0 RX | UART0 TX | I2C0 SDA | PWM0 A | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS DET |
17 | HSTX | SPI0 CSn | UART0 RX | I2C0 SCL | PWM0 B | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS EN |
18 | HSTX | SPI0 SCK | UART0 CTS | I2C1 SDA | PWM1 A | SIO | PIO0 | PIO1 | PIO2 |  | USB OVCUR DET | UART0 TX
19 | HSTX | SPI0 TX | UART0 RTS | I2C1 SCL | PWM1 B | SIO | PIO0 | PIO1 | PIO2 | XIP_CS1n | USB VBUS DET | UART0 RX
20 |  | SPI0 RX | UART1 TX | I2C0 SDA | PWM2 A | SIO | PIO0 | PIO1 | PIO2 | CLOCK GPIN0 | USB VBUS EN |
21 |  | SPI0 CSn | UART1 RX | I2C0 SCL | PWM2 B | SIO | PIO0 | PIO1 | PIO2 | CLOCK GPOUT0 | USB OVCUR DET |
22 |  | SPI0 SCK | UART1 CTS | I2C1 SDA | PWM3 A | SIO | PIO0 | PIO1 | PIO2 | CLOCK GPIN1 | USB VBUS DET | UART1 TX
23 |  | SPI0 TX | UART1 RTS | I2C1 SCL | PWM3 B | SIO | PIO0 | PIO1 | PIO2 | CLOCK GPOUT1 | USB VBUS EN | UART1 RX
24 |  | SPI1 RX | UART1 TX | I2C0 SDA | PWM4 A | SIO | PIO0 | PIO1 | PIO2 | CLOCK GPOUT2 | USB OVCUR DET |
25 |  | SPI1 CSn | UART1 RX | I2C0 SCL | PWM4 B | SIO | PIO0 | PIO1 | PIO2 | CLOCK GPOUT3 | USB VBUS DET |
26 |  | SPI1 SCK | UART1 CTS | I2C1 SDA | PWM5 A | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS EN | UART1 TX
27 |  | SPI1 TX | UART1 RTS | I2C1 SCL | PWM5 B | SIO | PIO0 | PIO1 | PIO2 |  | USB OVCUR DET | UART1 RX
28 |  | SPI1 RX | UART0 TX | I2C0 SDA | PWM6 A | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS DET |
29 |  | SPI1 CSn | UART0 RX | I2C0 SCL | PWM6 B | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS EN |

GPIOs 30 through 47 are QFN-80 only:

GPIO | F0 | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | F11
--- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | ---
30 |  | SPI1 SCK | UART0 CTS | I2C1 SDA | PWM7 A | SIO | PIO0 | PIO1 | PIO2 |  | USB OVCUR DET | UART0 TX
31 |  | SPI1 TX | UART0 RTS | I2C1 SCL | PWM7 B | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS DET | UART0 RX
32 |  | SPI0 RX | UART0 TX | I2C0 SDA | PWM8 A | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS EN |
33 |  | SPI0 CSn | UART0 RX | I2C0 SCL | PWM8 B | SIO | PIO0 | PIO1 | PIO2 |  | USB OVCUR DET |
34 |  | SPI0 SCK | UART0 CTS | I2C1 SDA | PWM9 A | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS DET | UART0 TX
35 |  | SPI0 TX | UART0 RTS | I2C1 SCL | PWM9 B | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS EN | UART0 RX
36 |  | SPI0 RX | UART1 TX | I2C0 SDA | PWM10 A | SIO | PIO0 | PIO1 | PIO2 |  | USB OVCUR DET |
37 |  | SPI0 CSn | UART1 RX | I2C0 SCL | PWM10 B | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS DET |
38 |  | SPI0 SCK | UART1 CTS | I2C1 SDA | PWM11 A | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS EN | UART1 TX
39 |  | SPI0 TX | UART1 RTS | I2C1 SCL | PWM11 B | SIO | PIO0 | PIO1 | PIO2 |  | USB OVCUR DET | UART1 RX
40 |  | SPI1 RX | UART1 TX | I2C0 SDA | PWM8 A | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS DET |
41 |  | SPI1 CSn | UART1 RX | I2C0 SCL | PWM8 B | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS EN |
42 |  | SPI1 SCK | UART1 CTS | I2C1 SDA | PWM9 A | SIO | PIO0 | PIO1 | PIO2 |  | USB OVCUR DET | UART1 TX
43 |  | SPI1 TX | UART1 RTS | I2C1 SCL | PWM9 B | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS DET | UART1 RX
44 |  | SPI1 RX | UART0 TX | I2C0 SDA | PWM10 A | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS EN |
45 |  | SPI1 CSn | UART0 RX | I2C0 SCL | PWM10 B | SIO | PIO0 | PIO1 | PIO2 |  | USB OVCUR DET |
46 |  | SPI1 SCK | UART0 CTS | I2C1 SDA | PWM11 A | SIO | PIO0 | PIO1 | PIO2 |  | USB VBUS DET | UART0 TX
47 |  | SPI1 TX | UART0 RTS | I2C1 SCL | PWM11 B | SIO | PIO0 | PIO1 | PIO2 | XIP_CS1n | USB VBUS EN | UART0 RX

## Typedef Documentation

## ◆ gpio_irq_callback_t

typedef void(* gpio_irq_callback_t) (uint gpio, uint32_t event_mask)

Callback function type for GPIO events

Parameters

  gpio | Which GPIO caused this interrupt
  event_mask | Which events caused this interrupt. See gpio_irq_level for details.

See also
  gpio_set_irq_enabled_with_callback()
  gpio_set_irq_callback()

## Enumeration Type Documentation

## ◆ gpio_drive_strength

enum gpio_drive_strength

Drive strength levels for GPIO outputs.

Drive strength levels for GPIO outputs.

See also
  gpio_set_drive_strength

Enumerator
GPIO_DRIVE_STRENGTH_2MA | 2 mA nominal drive strength
GPIO_DRIVE_STRENGTH_4MA | 4 mA nominal drive strength
GPIO_DRIVE_STRENGTH_8MA | 8 mA nominal drive strength
GPIO_DRIVE_STRENGTH_12MA | 12 mA nominal drive strength

## ◆ gpio_function_rp2040

enum gpio_function_rp2040

GPIO pin function selectors on RP2040 (used as typedef gpio_function_t)

Enumerator
GPIO_FUNC_XIP | Select XIP as GPIO pin function.
GPIO_FUNC_SPI | Select SPI as GPIO pin function.
GPIO_FUNC_UART | Select UART as GPIO pin function.
GPIO_FUNC_I2C | Select I2C as GPIO pin function.
GPIO_FUNC_PWM | Select PWM as GPIO pin function.
GPIO_FUNC_SIO | Select SIO as GPIO pin function.
GPIO_FUNC_PIO0 | Select PIO0 as GPIO pin function.
GPIO_FUNC_PIO1 | Select PIO1 as GPIO pin function.
GPIO_FUNC_GPCK | Select GPCK as GPIO pin function.
GPIO_FUNC_USB | Select USB as GPIO pin function.
GPIO_FUNC_NULL | Select NULL as GPIO pin function.

## ◆ gpio_function_rp2350

enum gpio_function_rp2350

GPIO pin function selectors on RP2350 (used as typedef gpio_function_t)

Enumerator
GPIO_FUNC_HSTX | Select HSTX as GPIO pin function.
GPIO_FUNC_SPI | Select SPI as GPIO pin function.
GPIO_FUNC_UART | Select UART as GPIO pin function.
GPIO_FUNC_I2C | Select I2C as GPIO pin function.
GPIO_FUNC_PWM | Select PWM as GPIO pin function.
GPIO_FUNC_SIO | Select SIO as GPIO pin function.
GPIO_FUNC_PIO0 | Select PIO0 as GPIO pin function.
GPIO_FUNC_PIO1 | Select PIO1 as GPIO pin function.
GPIO_FUNC_PIO2 | Select PIO2 as GPIO pin function.
GPIO_FUNC_GPCK | Select GPCK as GPIO pin function.
GPIO_FUNC_XIP_CS1 | Select XIP CS1 as GPIO pin function.
GPIO_FUNC_CORESIGHT_TRACE | Select CORESIGHT TRACE as GPIO pin function.
GPIO_FUNC_USB | Select USB as GPIO pin function.
GPIO_FUNC_UART_AUX | Select UART_AUX as GPIO pin function.
GPIO_FUNC_NULL | Select NULL as GPIO pin function.

## ◆ gpio_irq_level

enum gpio_irq_level

GPIO Interrupt level definitions (GPIO events)

GPIO Interrupt levels

An interrupt can be generated for every GPIO pin in 4 scenarios:

- Level High: the GPIO pin is a logical 1
- Level Low: the GPIO pin is a logical 0
- Edge High: the GPIO has transitioned from a logical 0 to a logical 1
- Edge Low: the GPIO has transitioned from a logical 1 to a logical 0

The level interrupts are not latched. This means that if the pin is a logical 1 and the level high interrupt is active, it will become inactive as soon as the pin changes to a logical 0. The edge interrupts are stored in the INTR register and can be cleared by writing to the INTR register.

Enumerator
GPIO_IRQ_LEVEL_LOW | IRQ when the GPIO pin is a logical 1.
GPIO_IRQ_LEVEL_HIGH | IRQ when the GPIO pin is a logical 0.
GPIO_IRQ_EDGE_FALL | IRQ when the GPIO has transitioned from a logical 0 to a logical 1.
GPIO_IRQ_EDGE_RISE | IRQ when the GPIO has transitioned from a logical 1 to a logical 0.

## ◆ gpio_slew_rate

enum gpio_slew_rate

Slew rate limiting levels for GPIO outputs.

Slew rate limiting increases the minimum rise/fall time when a GPIO output is lightly loaded, which can help to reduce electromagnetic emissions.

See also
  gpio_set_slew_rate

Enumerator
GPIO_SLEW_RATE_SLOW | Slew rate limiting enabled.
GPIO_SLEW_RATE_FAST | Slew rate limiting disabled.

## Function Documentation

## ◆ gpio_acknowledge_irq()

void gpio_acknowledge_irq | ( | uint | gpio,
|  | uint32_t | event_mask
| ) |  |

Acknowledge a GPIO interrupt for the specified events on the calling core.

Note
  This may be called with a mask of any of valid bits specified in gpio_irq_level, however it has no effect on level sensitive interrupts which remain pending while the GPIO is at the specified level. When handling level sensitive interrupts, you should generally disable the interrupt (see gpio_set_irq_enabled) and then set it up again later once the GPIO level has changed (or to catch the opposite level).

Parameters

  gpio | GPIO number

Note
  For callbacks set with gpio_set_irq_enabled_with_callback, or gpio_set_irq_callback, this function is called automatically.

Parameters

  event_mask | Bitmask of events to clear. See gpio_irq_level for details.

## ◆ gpio_add_raw_irq_handler()

static void gpio_add_raw_irq_handler | ( | uint | gpio,
|  | irq_handler_t | handler
| ) |  |
| inlinestatic

Adds a raw GPIO IRQ handler for a specific GPIO on the current core.

In addition to the default mechanism of a single GPIO IRQ event callback per core (see gpio_set_irq_callback), it is possible to add explicit GPIO IRQ handlers which are called independent of the default event callback.

This method adds such a callback, and disables the "default" callback for the specified GPIO.

Note
  Multiple raw handlers should not be added for the same GPIO, and this method will assert if you attempt to. Internally, this function calls irq_add_shared_handler, which will assert if the maximum number of shared handlers (configurable via PICO_MAX_IRQ_SHARED_HANDLERS) would be exceeded.

A raw handler should check for whichever GPIOs and events it handles, and acknowledge them itself; it might look something like:

void my_irq_handler(void) {
if (gpio_get_irq_event_mask(my_gpio_num) & my_gpio_event_mask) {
gpio_acknowledge_irq(my_gpio_num, my_gpio_event_mask);
// handle the IRQ
}
}
gpio_acknowledge_irq
void gpio_acknowledge_irq(uint gpio, uint32_t events)
Acknowledge a GPIO interrupt for the specified events on the calling core.
Definition: gpio.c:259
gpio_get_irq_event_mask
static uint32_t gpio_get_irq_event_mask(uint gpio)
Return the current interrupt status (pending events) for the given GPIO.
Definition: gpio.h:546

Parameters

  gpio | the GPIO number that will no longer be passed to the default callback for this core
  handler | the handler to add to the list of GPIO IRQ handlers for this core

## ◆ gpio_add_raw_irq_handler_masked()

void gpio_add_raw_irq_handler_masked | ( | uint32_t | gpio_mask,
|  | irq_handler_t | handler
| ) |  |

Adds a raw GPIO IRQ handler for the specified GPIOs on the current core.

In addition to the default mechanism of a single GPIO IRQ event callback per core (see gpio_set_irq_callback), it is possible to add explicit GPIO IRQ handlers which are called independent of the default event callback.

This method adds such a callback, and disables the "default" callback for the specified GPIOs.

Note
  Multiple raw handlers should not be added for the same GPIOs, and this method will assert if you attempt to. Internally, this function calls irq_add_shared_handler, which will assert if the maximum number of shared handlers (configurable via PICO_MAX_IRQ_SHARED_HANDLERS) would be exceeded.

A raw handler should check for whichever GPIOs and events it handles, and acknowledge them itself; it might look something like:

void my_irq_handler(void) {
if (gpio_get_irq_event_mask(my_gpio_num) & my_gpio_event_mask) {
gpio_acknowledge_irq(my_gpio_num, my_gpio_event_mask);
// handle the IRQ
}
if (gpio_get_irq_event_mask(my_gpio_num2) & my_gpio_event_mask2) {
gpio_acknowledge_irq(my_gpio_num2, my_gpio_event_mask2);
// handle the IRQ
}
}

Parameters

  gpio_mask | a bit mask of the GPIO numbers that will no longer be passed to the default callback for this core
  handler | the handler to add to the list of GPIO IRQ handlers for this core

## ◆ gpio_add_raw_irq_handler_masked64()

void gpio_add_raw_irq_handler_masked64 | ( | uint64_t | gpio_mask,
|  | irq_handler_t | handler
| ) |  |

Adds a raw GPIO IRQ handler for the specified GPIOs on the current core.

In addition to the default mechanism of a single GPIO IRQ event callback per core (see gpio_set_irq_callback), it is possible to add explicit GPIO IRQ handlers which are called independent of the default event callback.

This method adds such a callback, and disables the "default" callback for the specified GPIOs.

Note
  Multiple raw handlers should not be added for the same GPIOs, and this method will assert if you attempt to. Internally, this function calls irq_add_shared_handler, which will assert if the maximum number of shared handlers (configurable via PICO_MAX_IRQ_SHARED_HANDLERS) would be exceeded.

A raw handler should check for whichever GPIOs and events it handles, and acknowledge them itself; it might look something like:

void my_irq_handler(void) {
if (gpio_get_irq_event_mask(my_gpio_num) & my_gpio_event_mask) {
gpio_acknowledge_irq(my_gpio_num, my_gpio_event_mask);
// handle the IRQ
}
if (gpio_get_irq_event_mask(my_gpio_num2) & my_gpio_event_mask2) {
gpio_acknowledge_irq(my_gpio_num2, my_gpio_event_mask2);
// handle the IRQ
}
}

Parameters

  gpio_mask | a 64 bit mask of the GPIO numbers that will no longer be passed to the default callback for this core
  handler | the handler to add to the list of GPIO IRQ handlers for this core

## ◆ gpio_add_raw_irq_handler_with_order_priority()

static void gpio_add_raw_irq_handler_with_order_priority | ( | uint | gpio,
|  | irq_handler_t | handler,
|  | uint8_t | order_priority
| ) |  |
| inlinestatic

Adds a raw GPIO IRQ handler for a specific GPIO on the current core.

In addition to the default mechanism of a single GPIO IRQ event callback per core (see gpio_set_irq_callback), it is possible to add explicit GPIO IRQ handlers which are called independent of the default callback. The order relative to the default callback can be controlled via the order_priority parameter(the default callback has the priority GPIO_IRQ_CALLBACK_ORDER_PRIORITY which defaults to the lowest priority with the intention of it running last).

This method adds such a callback, and disables the "default" callback for the specified GPIO.

Note
  Multiple raw handlers should not be added for the same GPIO, and this method will assert if you attempt to. Internally, this function calls irq_add_shared_handler, which will assert if the maximum number of shared handlers (configurable via PICO_MAX_IRQ_SHARED_HANDLERS) would be exceeded.

A raw handler should check for whichever GPIOs and events it handles, and acknowledge them itself; it might look something like:

void my_irq_handler(void) {
if (gpio_get_irq_event_mask(my_gpio_num) & my_gpio_event_mask) {
gpio_acknowledge_irq(my_gpio_num, my_gpio_event_mask);
// handle the IRQ
}
}

Parameters

  gpio | the GPIO number that will no longer be passed to the default callback for this core
  handler | the handler to add to the list of GPIO IRQ handlers for this core
  order_priority | the priority order to determine the relative position of the handler in the list of GPIO IRQ handlers for this core.

## ◆ gpio_add_raw_irq_handler_with_order_priority_masked()

void gpio_add_raw_irq_handler_with_order_priority_masked | ( | uint32_t | gpio_mask,
|  | irq_handler_t | handler,
|  | uint8_t | order_priority
| ) |  |

Adds a raw GPIO IRQ handler for the specified GPIOs on the current core.

In addition to the default mechanism of a single GPIO IRQ event callback per core (see gpio_set_irq_callback), it is possible to add explicit GPIO IRQ handlers which are called independent of the default callback. The order relative to the default callback can be controlled via the order_priority parameter (the default callback has the priority GPIO_IRQ_CALLBACK_ORDER_PRIORITY which defaults to the lowest priority with the intention of it running last).

This method adds such an explicit GPIO IRQ handler, and disables the "default" callback for the specified GPIOs.

Note
  Multiple raw handlers should not be added for the same GPIOs, and this method will assert if you attempt to. Internally, this function calls irq_add_shared_handler, which will assert if the maximum number of shared handlers (configurable via PICO_MAX_IRQ_SHARED_HANDLERS) would be exceeded.

A raw handler should check for whichever GPIOs and events it handles, and acknowledge them itself; it might look something like:

void my_irq_handler(void) {
if (gpio_get_irq_event_mask(my_gpio_num) & my_gpio_event_mask) {
gpio_acknowledge_irq(my_gpio_num, my_gpio_event_mask);
// handle the IRQ
}
if (gpio_get_irq_event_mask(my_gpio_num2) & my_gpio_event_mask2) {
gpio_acknowledge_irq(my_gpio_num2, my_gpio_event_mask2);
// handle the IRQ
}
}

Parameters

  gpio_mask | a bit mask of the GPIO numbers that will no longer be passed to the default callback for this core
  handler | the handler to add to the list of GPIO IRQ handlers for this core
  order_priority | the priority order to determine the relative position of the handler in the list of GPIO IRQ handlers for this core.

## ◆ gpio_add_raw_irq_handler_with_order_priority_masked64()

void gpio_add_raw_irq_handler_with_order_priority_masked64 | ( | uint64_t | gpio_mask,
|  | irq_handler_t | handler,
|  | uint8_t | order_priority
| ) |  |

Adds a raw GPIO IRQ handler for the specified GPIOs on the current core.

In addition to the default mechanism of a single GPIO IRQ event callback per core (see gpio_set_irq_callback), it is possible to add explicit GPIO IRQ handlers which are called independent of the default callback. The order relative to the default callback can be controlled via the order_priority parameter (the default callback has the priority GPIO_IRQ_CALLBACK_ORDER_PRIORITY which defaults to the lowest priority with the intention of it running last).

This method adds such an explicit GPIO IRQ handler, and disables the "default" callback for the specified GPIOs.

Note
  Multiple raw handlers should not be added for the same GPIOs, and this method will assert if you attempt to. Internally, this function calls irq_add_shared_handler, which will assert if the maximum number of shared handlers (configurable via PICO_MAX_IRQ_SHARED_HANDLERS) would be exceeded.

A raw handler should check for whichever GPIOs and events it handles, and acknowledge them itself; it might look something like:

void my_irq_handler(void) {
if (gpio_get_irq_event_mask(my_gpio_num) & my_gpio_event_mask) {
gpio_acknowledge_irq(my_gpio_num, my_gpio_event_mask);
// handle the IRQ
}
if (gpio_get_irq_event_mask(my_gpio_num2) & my_gpio_event_mask2) {
gpio_acknowledge_irq(my_gpio_num2, my_gpio_event_mask2);
// handle the IRQ
}
}

Parameters

  gpio_mask | a bit mask of the GPIO numbers that will no longer be passed to the default callback for this core
  handler | the handler to add to the list of GPIO IRQ handlers for this core
  order_priority | the priority order to determine the relative position of the handler in the list of GPIO IRQ handlers for this core.

## ◆ gpio_clr_mask()

static void gpio_clr_mask | ( | uint32_t | mask | ) |
| inlinestatic

Drive low every GPIO appearing in mask.

Parameters

  mask | Bitmask of GPIO values to clear

## ◆ gpio_clr_mask64()

static void gpio_clr_mask64 | ( | uint64_t | mask | ) |
| inlinestatic

Drive low every GPIO appearing in mask.

Parameters

  mask | Bitmask of GPIO values to clear

## ◆ gpio_clr_mask_n()

static void gpio_clr_mask_n | ( | uint | n,
|  | uint32_t | mask
| ) |  |
| inlinestatic

Drive low every GPIO appearing in mask.

Parameters

  n | the base GPIO index of the mask to update. n == 0 means 0->31, n == 1 mean 32->63 etc.
  mask | Bitmask of 32 GPIO values to clear

## ◆ gpio_deinit()

void gpio_deinit | ( | uint | gpio | ) |

Resets a GPIO back to the NULL function, i.e. disables it.

Parameters

  gpio | GPIO number

## ◆ gpio_disable_pulls()

static void gpio_disable_pulls | ( | uint | gpio | ) |
| inlinestatic

Disable pulls on specified GPIO.

Parameters

  gpio | GPIO number

## ◆ gpio_get()

static bool gpio_get | ( | uint | gpio | ) |
| inlinestatic

Get state of a single specified GPIO.

Parameters

  gpio | GPIO number

Returns
  Current state of the GPIO. 0 for low, non-zero for high

## ◆ gpio_get_all()

static uint32_t gpio_get_all | ( | void |  | ) |
| inlinestatic

Get raw value of all GPIOs.

Returns
  Bitmask of raw GPIO values

## ◆ gpio_get_all64()

static uint64_t gpio_get_all64 | ( | void |  | ) |
| inlinestatic

Get raw value of all GPIOs.

Returns
  Bitmask of raw GPIO values

## ◆ gpio_get_dir()

static uint gpio_get_dir | ( | uint | gpio | ) |
| inlinestatic

Get a specific GPIO direction.

Parameters

  gpio | GPIO number

Returns
  1 for out, 0 for in

## ◆ gpio_get_drive_strength()

enum gpio_drive_strength gpio_get_drive_strength | ( | uint | gpio | ) |

Determine current drive strength for a specified GPIO.

See also
  gpio_set_drive_strength

Parameters

  gpio | GPIO number

Returns
  Current drive strength of that GPIO

## ◆ gpio_get_function()

gpio_function_t gpio_get_function | ( | uint | gpio | ) |

Determine current GPIO function.

Parameters

  gpio | GPIO number

Returns
  Which GPIO function is currently selected from list gpio_function

## ◆ gpio_get_irq_event_mask()

static uint32_t gpio_get_irq_event_mask | ( | uint | gpio | ) |
| inlinestatic

Return the current interrupt status (pending events) for the given GPIO.

Parameters

  gpio | GPIO number

Returns
  Bitmask of events that are currently pending for the GPIO. See gpio_irq_level for details.

See also
  gpio_acknowledge_irq

## ◆ gpio_get_out_level()

static bool gpio_get_out_level | ( | uint | gpio | ) |
| inlinestatic

Determine whether a GPIO is currently driven high or low.

This function returns the high/low output level most recently assigned to a GPIO via gpio_put() or similar. This is the value that is presented outward to the IO muxing, not the input level back from the pad (which can be read using gpio_get()).

To avoid races, this function must not be used for read-modify-write sequences when driving GPIOs – instead functions like gpio_put() should be used to atomically update GPIOs. This accessor is intended for debug use only.

Parameters

  gpio | GPIO number

Returns
  true if the GPIO output level is high, false if low.

## ◆ gpio_get_slew_rate()

enum gpio_slew_rate gpio_get_slew_rate | ( | uint | gpio | ) |

Determine current slew rate for a specified GPIO.

See also
  gpio_set_slew_rate

Parameters

  gpio | GPIO number

Returns
  Current slew rate of that GPIO

## ◆ gpio_init()

void gpio_init | ( | uint | gpio | ) |

Initialise a GPIO for (enabled I/O and set func to GPIO_FUNC_SIO)

Clear the output enable (i.e. set to input). Clear any output value.

Parameters

  gpio | GPIO number

## ◆ gpio_init_mask()

void gpio_init_mask | ( | uint | gpio_mask | ) |

Initialise multiple GPIOs (enabled I/O and set func to GPIO_FUNC_SIO)

Clear the output enable (i.e. set to input). Clear any output value.

Parameters

  gpio_mask | Mask with 1 bit per GPIO number to initialize

## ◆ gpio_is_dir_out()

static bool gpio_is_dir_out | ( | uint | gpio | ) |
| inlinestatic

Check if a specific GPIO direction is OUT.

Parameters

  gpio | GPIO number

Returns
  true if the direction for the pin is OUT

## ◆ gpio_is_input_hysteresis_enabled()

bool gpio_is_input_hysteresis_enabled | ( | uint | gpio | ) |

Determine whether input hysteresis is enabled on a specified GPIO.

See also
  gpio_set_input_hysteresis_enabled

Parameters

  gpio | GPIO number

## ◆ gpio_is_pulled_down()

static bool gpio_is_pulled_down | ( | uint | gpio | ) |
| inlinestatic

Determine if the specified GPIO is pulled down.

Parameters

  gpio | GPIO number

Returns
  true if the GPIO is pulled down

## ◆ gpio_is_pulled_up()

static bool gpio_is_pulled_up | ( | uint | gpio | ) |
| inlinestatic

Determine if the specified GPIO is pulled up.

Parameters

  gpio | GPIO number

Returns
  true if the GPIO is pulled up

## ◆ gpio_pull_down()

static void gpio_pull_down | ( | uint | gpio | ) |
| inlinestatic

Set specified GPIO to be pulled down.

Parameters

  gpio | GPIO number

## ◆ gpio_pull_up()

static void gpio_pull_up | ( | uint | gpio | ) |
| inlinestatic

Set specified GPIO to be pulled up.

Parameters

  gpio | GPIO number

## ◆ gpio_put()

static void gpio_put | ( | uint | gpio,
|  | bool | value
| ) |  |
| inlinestatic

Drive a single GPIO high/low.

Parameters

  gpio | GPIO number
  value | If false clear the GPIO, otherwise set it.

## ◆ gpio_put_all()

static void gpio_put_all | ( | uint32_t | value | ) |
| inlinestatic

Drive all pins simultaneously.

Parameters

  value | Bitmask of GPIO values to change

## ◆ gpio_put_all64()

static void gpio_put_all64 | ( | uint64_t | value | ) |
| inlinestatic

Drive all pins simultaneously.

Parameters

  value | Bitmask of GPIO values to change

## ◆ gpio_put_masked()

static void gpio_put_masked | ( | uint32_t | mask,
|  | uint32_t | value
| ) |  |
| inlinestatic

Drive GPIOs high/low depending on parameters.

Parameters

  mask | Bitmask of GPIO values to change
  value | Value to set

For each 1 bit in `mask`, drive that pin to the value given by corresponding bit in `value`, leaving other pins unchanged. Since this uses the TOGL alias, it is concurrency-safe with e.g. an IRQ bashing different pins from the same core.

## ◆ gpio_put_masked64()

static void gpio_put_masked64 | ( | uint64_t | mask,
|  | uint64_t | value
| ) |  |
| inlinestatic

Drive GPIOs high/low depending on parameters.

Parameters

  mask | Bitmask of GPIO values to change
  value | Value to set

For each 1 bit in `mask`, drive that pin to the value given by corresponding bit in `value`, leaving other pins unchanged. Since this uses the TOGL alias, it is concurrency-safe with e.g. an IRQ bashing different pins from the same core.

## ◆ gpio_put_masked_n()

static void gpio_put_masked_n | ( | uint | n,
|  | uint32_t | mask,
|  | uint32_t | value
| ) |  |
| inlinestatic

Drive GPIOs high/low depending on parameters.

Parameters

  n | the base GPIO index of the mask to update. n == 0 means 0->31, n == 1 mean 32->63 etc.
  mask | Bitmask of GPIO values to change
  value | Value to set

For each 1 bit in `mask`, drive that pin to the value given by corresponding bit in `value`, leaving other pins unchanged. Since this uses the TOGL alias, it is concurrency-safe with e.g. an IRQ bashing different pins from the same core.

## ◆ gpio_remove_raw_irq_handler()

static void gpio_remove_raw_irq_handler | ( | uint | gpio,
|  | irq_handler_t | handler
| ) |  |
| inlinestatic

Removes a raw GPIO IRQ handler for the specified GPIO on the current core.

In addition to the default mechanism of a single GPIO IRQ event callback per core (see gpio_set_irq_callback), it is possible to add explicit GPIO IRQ handlers which are called independent of the default event callback.

This method removes such a callback, and enables the "default" callback for the specified GPIO.

Parameters

  gpio | the GPIO number that will now be passed to the default callback for this core
  handler | the handler to remove from the list of GPIO IRQ handlers for this core

## ◆ gpio_remove_raw_irq_handler_masked()

void gpio_remove_raw_irq_handler_masked | ( | uint32_t | gpio_mask,
|  | irq_handler_t | handler
| ) |  |

Removes a raw GPIO IRQ handler for the specified GPIOs on the current core.

In addition to the default mechanism of a single GPIO IRQ event callback per core (see gpio_set_irq_callback), it is possible to add explicit GPIO IRQ handlers which are called independent of the default event callback.

This method removes such a callback, and enables the "default" callback for the specified GPIOs.

Parameters

  gpio_mask | a bit mask of the GPIO numbers that will now be passed to the default callback for this core
  handler | the handler to remove from the list of GPIO IRQ handlers for this core

## ◆ gpio_remove_raw_irq_handler_masked64()

void gpio_remove_raw_irq_handler_masked64 | ( | uint64_t | gpio_mask,
|  | irq_handler_t | handler
| ) |  |

Removes a raw GPIO IRQ handler for the specified GPIOs on the current core.

In addition to the default mechanism of a single GPIO IRQ event callback per core (see gpio_set_irq_callback), it is possible to add explicit GPIO IRQ handlers which are called independent of the default event callback.

This method removes such a callback, and enables the "default" callback for the specified GPIOs.

Parameters

  gpio_mask | a bit mask of the GPIO numbers that will now be passed to the default callback for this core
  handler | the handler to remove from the list of GPIO IRQ handlers for this core

## ◆ gpio_set_dir()

static void gpio_set_dir | ( | uint | gpio,
|  | bool | out
| ) |  |
| inlinestatic

Set a single GPIO direction.

Parameters

  gpio | GPIO number
  out | true for out, false for in

## ◆ gpio_set_dir_all_bits()

static void gpio_set_dir_all_bits | ( | uint32_t | values | ) |
| inlinestatic

Set direction of all pins simultaneously.

Parameters

  values | individual settings for each gpio; for GPIO N, bit N is 1 for out, 0 for in

## ◆ gpio_set_dir_all_bits64()

static void gpio_set_dir_all_bits64 | ( | uint64_t | values | ) |
| inlinestatic

Set direction of all pins simultaneously.

Parameters

  values | individual settings for each gpio; for GPIO N, bit N is 1 for out, 0 for in

## ◆ gpio_set_dir_in_masked()

static void gpio_set_dir_in_masked | ( | uint32_t | mask | ) |
| inlinestatic

Set a number of GPIOs to input.

Parameters

  mask | Bitmask of GPIO to set to input

## ◆ gpio_set_dir_in_masked64()

static void gpio_set_dir_in_masked64 | ( | uint64_t | mask | ) |
| inlinestatic

Set a number of GPIOs to input.

Parameters

  mask | Bitmask of GPIO to set to input

## ◆ gpio_set_dir_masked()

static void gpio_set_dir_masked | ( | uint32_t | mask,
|  | uint32_t | value
| ) |  |
| inlinestatic

Set multiple GPIO directions.

Parameters

  mask | Bitmask of GPIO to set to input, as bits 0-29
  value | Values to set

For each 1 bit in "mask", switch that pin to the direction given by corresponding bit in "value", leaving other pins unchanged. E.g. gpio_set_dir_masked(0x3, 0x2); -> set pin 0 to input, pin 1 to output, simultaneously.

## ◆ gpio_set_dir_masked64()

static void gpio_set_dir_masked64 | ( | uint64_t | mask,
|  | uint64_t | value
| ) |  |
| inlinestatic

Set multiple GPIO directions.

Parameters

  mask | Bitmask of GPIO to set to input, as bits 0-29
  value | Values to set

For each 1 bit in "mask", switch that pin to the direction given by corresponding bit in "value", leaving other pins unchanged. E.g. gpio_set_dir_masked(0x3, 0x2); -> set pin 0 to input, pin 1 to output, simultaneously.

## ◆ gpio_set_dir_out_masked()

static void gpio_set_dir_out_masked | ( | uint32_t | mask | ) |
| inlinestatic

Set a number of GPIOs to output.

Switch all GPIOs in "mask" to output

Parameters

  mask | Bitmask of GPIO to set to output

## ◆ gpio_set_dir_out_masked64()

static void gpio_set_dir_out_masked64 | ( | uint64_t | mask | ) |
| inlinestatic

Set a number of GPIOs to output.

Switch all GPIOs in "mask" to output

Parameters

  mask | Bitmask of GPIO to set to output

## ◆ gpio_set_dormant_irq_enabled()

void gpio_set_dormant_irq_enabled | ( | uint | gpio,
|  | uint32_t | event_mask,
|  | bool | enabled
| ) |  |

Enable dormant wake up interrupt for specified GPIO and events.

This configures IRQs to restart the XOSC or ROSC when they are disabled in dormant mode

Parameters

  gpio | GPIO number
  event_mask | Which events will cause an interrupt. See gpio_irq_level for details.
  enabled | Enable/disable flag

## ◆ gpio_set_drive_strength()

void gpio_set_drive_strength | ( | uint | gpio,
|  | enum gpio_drive_strength | drive
| ) |  |

Set drive strength for a specified GPIO.

See also
  gpio_get_drive_strength

Parameters

  gpio | GPIO number
  drive | GPIO output drive strength

## ◆ gpio_set_function()

void gpio_set_function | ( | uint | gpio,
|  | gpio_function_t | fn
| ) |  |

Select GPIO function.

Parameters

  gpio | GPIO number
  fn | Which GPIO function select to use from list gpio_function

## ◆ gpio_set_function_masked()

void gpio_set_function_masked | ( | uint32_t | gpio_mask,
|  | gpio_function_t | fn
| ) |  |

Select the function for multiple GPIOs.

See also
  gpio_set_function

Parameters

  gpio_mask | Mask with 1 bit per GPIO number to set the function for
  fn | Which GPIO function select to use from list gpio_function

## ◆ gpio_set_function_masked64()

void gpio_set_function_masked64 | ( | uint64_t | gpio_mask,
|  | gpio_function_t | fn
| ) |  |

Select the function for multiple GPIOs.

See also
  gpio_set_function

Parameters

  gpio_mask | Mask with 1 bit per GPIO number to set the function for
  fn | Which GPIO function select to use from list gpio_function

## ◆ gpio_set_inover()

void gpio_set_inover | ( | uint | gpio,
|  | uint | value
| ) |  |

Select GPIO input override.

Parameters

  gpio | GPIO number
  value | See gpio_override

## ◆ gpio_set_input_enabled()

void gpio_set_input_enabled | ( | uint | gpio,
|  | bool | enabled
| ) |  |

Enable GPIO input.

Parameters

  gpio | GPIO number
  enabled | true to enable input on specified GPIO

## ◆ gpio_set_input_hysteresis_enabled()

void gpio_set_input_hysteresis_enabled | ( | uint | gpio,
|  | bool | enabled
| ) |  |

Enable/disable GPIO input hysteresis (Schmitt trigger)

Enable or disable the Schmitt trigger hysteresis on a given GPIO. This is enabled on all GPIOs by default. Disabling input hysteresis can lead to inconsistent readings when the input signal has very long rise or fall times, but slightly reduces the GPIO's input delay.

See also
  gpio_is_input_hysteresis_enabled

Parameters

  gpio | GPIO number
  enabled | true to enable input hysteresis on specified GPIO

## ◆ gpio_set_irq_callback()

void gpio_set_irq_callback | ( | gpio_irq_callback_t | callback | ) |

Set the generic callback used for GPIO IRQ events for the current core.

This function sets the callback used for all GPIO IRQs on the current core that are not explicitly hooked via gpio_add_raw_irq_handler or other gpio_add_raw_irq_handler_ functions.

This function is called with the GPIO number and event mask for each of the (not explicitly hooked) GPIOs that have events enabled and that are pending (see gpio_get_irq_event_mask).

Note
  The IO IRQs are independent per-processor. This function affects the processor that calls the function.

Parameters

  callback | default user function to call on GPIO irq. Note only one of these can be set per processor.

## ◆ gpio_set_irq_enabled()

void gpio_set_irq_enabled | ( | uint | gpio,
|  | uint32_t | event_mask,
|  | bool | enabled
| ) |  |

Enable or disable specific interrupt events for specified GPIO.

This function sets which GPIO events cause a GPIO interrupt on the calling core. See gpio_set_irq_callback, gpio_set_irq_enabled_with_callback and gpio_add_raw_irq_handler to set up a GPIO interrupt handler to handle the events.

Note
  The IO IRQs are independent per-processor. This configures the interrupt events for the processor that calls the function.

Parameters

  gpio | GPIO number
  event_mask | Which events will cause an interrupt
  enabled | Enable or disable flag

Events is a bitmask of the following gpio_irq_level values:

bit | constant | interrupt
--- | --- | ---
0 | GPIO_IRQ_LEVEL_LOW | Continuously while level is low
1 | GPIO_IRQ_LEVEL_HIGH | Continuously while level is high
2 | GPIO_IRQ_EDGE_FALL | On each transition from high to low
3 | GPIO_IRQ_EDGE_RISE | On each transition from low to high

which are specified in gpio_irq_level

## ◆ gpio_set_irq_enabled_with_callback()

void gpio_set_irq_enabled_with_callback | ( | uint | gpio,
|  | uint32_t | event_mask,
|  | bool | enabled,
|  | gpio_irq_callback_t | callback
| ) |  |

Convenience function which performs multiple GPIO IRQ related initializations.

This method is a slightly eclectic mix of initialization, that:

- Updates whether the specified events for the specified GPIO causes an interrupt on the calling core based on the enable flag.

- Sets the callback handler for the calling core to callback (or clears the handler if the callback is NULL).

- Enables GPIO IRQs on the current core if enabled is true.

This method is commonly used to perform a one time setup, and following that any additional IRQs/events are enabled via gpio_set_irq_enabled. All GPIOs/events added in this way on the same core share the same callback; for multiple independent handlers for different GPIOs you should use gpio_add_raw_irq_handler and related functions.

This method is equivalent to:

gpio_set_irq_enabled(gpio, event_mask, enabled);
gpio_set_irq_callback(callback);
if (enabled) irq_set_enabled(IO_IRQ_BANK0, true);
gpio_set_irq_enabled
void gpio_set_irq_enabled(uint gpio, uint32_t events, bool enabled)
Enable or disable specific interrupt events for specified GPIO.
Definition: gpio.c:186
gpio_set_irq_callback
void gpio_set_irq_callback(gpio_irq_callback_t callback)
Set the generic callback used for GPIO IRQ events for the current core.
Definition: gpio.c:208
irq_set_enabled
void irq_set_enabled(uint num, bool enabled)
Enable or disable a specific interrupt on the executing core.
Definition: irq.c:61
IO_IRQ_BANK0
@ IO_IRQ_BANK0
Select IO_BANK0's IRQ output.
Definition: intctrl.h:95

Note
  The IO IRQs are independent per-processor. This method affects only the processor that calls the function.

Parameters

  gpio | GPIO number
  event_mask | Which events will cause an interrupt. See gpio_irq_level for details.
  enabled | Enable or disable flag
  callback | user function to call on GPIO irq. if NULL, the callback is removed

## ◆ gpio_set_irqover()

void gpio_set_irqover | ( | uint | gpio,
|  | uint | value
| ) |  |

Set GPIO IRQ override.

Optionally invert a GPIO IRQ signal, or drive it high or low

Parameters

  gpio | GPIO number
  value | See gpio_override

## ◆ gpio_set_mask()

static void gpio_set_mask | ( | uint32_t | mask | ) |
| inlinestatic

Drive high every GPIO appearing in mask.

Parameters

  mask | Bitmask of GPIO values to set

## ◆ gpio_set_mask64()

static void gpio_set_mask64 | ( | uint64_t | mask | ) |
| inlinestatic

Drive high every GPIO appearing in mask.

Parameters

  mask | Bitmask of GPIO values to set

## ◆ gpio_set_mask_n()

static void gpio_set_mask_n | ( | uint | n,
|  | uint32_t | mask
| ) |  |
| inlinestatic

Drive high every GPIO appearing in mask.

Parameters

  n | the base GPIO index of the mask to update. n == 0 means 0->31, n == 1 mean 32->63 etc.
  mask | Bitmask of 32 GPIO values to set

## ◆ gpio_set_oeover()

void gpio_set_oeover | ( | uint | gpio,
|  | uint | value
| ) |  |

Select GPIO output enable override.

Parameters

  gpio | GPIO number
  value | See gpio_override

## ◆ gpio_set_outover()

void gpio_set_outover | ( | uint | gpio,
|  | uint | value
| ) |  |

Set GPIO output override.

Parameters

  gpio | GPIO number
  value | See gpio_override

## ◆ gpio_set_pulls()

void gpio_set_pulls | ( | uint | gpio,
|  | bool | up,
|  | bool | down
| ) |  |

Select up and down pulls on specific GPIO.

Parameters

  gpio | GPIO number
  up | If true set a pull up on the GPIO
  down | If true set a pull down on the GPIO

Note
  On the RP2040, setting both pulls enables a "bus keep" function, i.e. a weak pull to whatever is current high/low state of GPIO.

## ◆ gpio_set_slew_rate()

void gpio_set_slew_rate | ( | uint | gpio,
|  | enum gpio_slew_rate | slew
| ) |  |

Set slew rate for a specified GPIO.

See also
  gpio_get_slew_rate

Parameters

  gpio | GPIO number
  slew | GPIO output slew rate

## ◆ gpio_xor_mask()

static void gpio_xor_mask | ( | uint32_t | mask | ) |
| inlinestatic

Toggle every GPIO appearing in mask.

Parameters

  mask | Bitmask of GPIO values to toggle

## ◆ gpio_xor_mask64()

static void gpio_xor_mask64 | ( | uint64_t | mask | ) |
| inlinestatic

Toggle every GPIO appearing in mask.

Parameters

  mask | Bitmask of GPIO values to toggle

## ◆ gpio_xor_mask_n()

static void gpio_xor_mask_n | ( | uint | n,
|  | uint32_t | mask
| ) |  |
| inlinestatic

Toggle every GPIO appearing in mask.

Parameters

  n | the base GPIO index of the mask to update. n == 0 means 0->31, n == 1 mean 32->63 etc.
  mask | Bitmask of 32 GPIO values to toggle