v2.0.0
tmds_encode.h
1// THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
2
8#ifndef _HARDWARE_STRUCTS_TMDS_ENCODE_H
9#define _HARDWARE_STRUCTS_TMDS_ENCODE_H
10
15#include "hardware/address_mapped.h"
16#include "hardware/regs/sio.h"
17
18// Reference to datasheet: https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf#tab-registerlist_sio
19//
20// The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature)
21// _REG_(x) will link to the corresponding register in hardware/regs/sio.h.
22//
23// Bit-field descriptions are of the form:
24// BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION
25
26 typedef struct {
27 _REG_(SIO_TMDS_CTRL_OFFSET) // SIO_TMDS_CTRL
28 // Control register for TMDS encoder
29 // 0x10000000 [28] CLEAR_BALANCE (0) Clear the running DC balance state of the TMDS encoders
30 // 0x08000000 [27] PIX2_NOSHIFT (0) When encoding two pixels's worth of symbols in one cycle...
31 // 0x07000000 [26:24] PIX_SHIFT (0x0) Shift applied to the colour data register with each read...
32 // 0x00800000 [23] INTERLEAVE (0) Enable lane interleaving for reads of PEEK_SINGLE/POP_SINGLE
33 // 0x001c0000 [20:18] L2_NBITS (0x0) Number of valid colour MSBs for lane 2 (1-8 bits,...
34 // 0x00038000 [17:15] L1_NBITS (0x0) Number of valid colour MSBs for lane 1 (1-8 bits,...
35 // 0x00007000 [14:12] L0_NBITS (0x0) Number of valid colour MSBs for lane 0 (1-8 bits,...
36 // 0x00000f00 [11:8] L2_ROT (0x0) Right-rotate the 16 LSBs of the colour accumulator by...
37 // 0x000000f0 [7:4] L1_ROT (0x0) Right-rotate the 16 LSBs of the colour accumulator by...
38 // 0x0000000f [3:0] L0_ROT (0x0) Right-rotate the 16 LSBs of the colour accumulator by...
39 io_rw_32 tmds_ctrl;
40
41 _REG_(SIO_TMDS_WDATA_OFFSET) // SIO_TMDS_WDATA
42 // Write-only access to the TMDS colour data register
43 // 0xffffffff [31:0] TMDS_WDATA (0x00000000)
44 io_wo_32 tmds_wdata;
45
46 _REG_(SIO_TMDS_PEEK_SINGLE_OFFSET) // SIO_TMDS_PEEK_SINGLE
47 // Get the encoding of one pixel's worth of colour data, packed into a 32-bit value (3x10-bit symbols)
48 // 0xffffffff [31:0] TMDS_PEEK_SINGLE (0x00000000)
49 io_ro_32 tmds_peek_single;
50
51 _REG_(SIO_TMDS_POP_SINGLE_OFFSET) // SIO_TMDS_POP_SINGLE
52 // Get the encoding of one pixel's worth of colour data, packed into a 32-bit value
53 // 0xffffffff [31:0] TMDS_POP_SINGLE (0x00000000)
54 io_ro_32 tmds_pop_single;
55
56 _REG_(SIO_TMDS_PEEK_DOUBLE_L0_OFFSET) // SIO_TMDS_PEEK_DOUBLE_L0
57 // Get lane 0 of the encoding of two pixels' worth of colour data
58 // 0xffffffff [31:0] TMDS_PEEK_DOUBLE_L0 (0x00000000)
59 io_ro_32 tmds_peek_double_l0;
60
61 _REG_(SIO_TMDS_POP_DOUBLE_L0_OFFSET) // SIO_TMDS_POP_DOUBLE_L0
62 // Get lane 0 of the encoding of two pixels' worth of colour data
63 // 0xffffffff [31:0] TMDS_POP_DOUBLE_L0 (0x00000000)
64 io_ro_32 tmds_pop_double_l0;
65
66 _REG_(SIO_TMDS_PEEK_DOUBLE_L1_OFFSET) // SIO_TMDS_PEEK_DOUBLE_L1
67 // Get lane 1 of the encoding of two pixels' worth of colour data
68 // 0xffffffff [31:0] TMDS_PEEK_DOUBLE_L1 (0x00000000)
69 io_ro_32 tmds_peek_double_l1;
70
71 _REG_(SIO_TMDS_POP_DOUBLE_L1_OFFSET) // SIO_TMDS_POP_DOUBLE_L1
72 // Get lane 1 of the encoding of two pixels' worth of colour data
73 // 0xffffffff [31:0] TMDS_POP_DOUBLE_L1 (0x00000000)
74 io_ro_32 tmds_pop_double_l1;
75
76 _REG_(SIO_TMDS_PEEK_DOUBLE_L2_OFFSET) // SIO_TMDS_PEEK_DOUBLE_L2
77 // Get lane 2 of the encoding of two pixels' worth of colour data
78 // 0xffffffff [31:0] TMDS_PEEK_DOUBLE_L2 (0x00000000)
79 io_ro_32 tmds_peek_double_l2;
80
81 _REG_(SIO_TMDS_POP_DOUBLE_L2_OFFSET) // SIO_TMDS_POP_DOUBLE_L2
82 // Get lane 2 of the encoding of two pixels' worth of colour data
83 // 0xffffffff [31:0] TMDS_POP_DOUBLE_L2 (0x00000000)
84 io_ro_32 tmds_pop_double_l2;
85} tmds_encode_hw_t;
86
87#define tmds_encode_hw ((tmds_encode_hw_t *)(SIO_BASE + SIO_TMDS_CTRL_OFFSET))
88#define tmds_encode_ns_hw ((tmds_encode_hw_t *)(SIO_NONSEC_BASE + SIO_TMDS_CTRL_OFFSET))
89static_assert(sizeof (tmds_encode_hw_t) == 0x0028, "");
90
91#endif // _HARDWARE_STRUCTS_TMDS_ENCODE_H
92
address_mapped.h
tmds_encode_hw_t
Definition: tmds_encode.h:26