v2.0.0
Public Member Functions | Data Fields
dma_hw_t Struct Reference
Collaboration diagram for dma_hw_t:
[legend]

## Public Member Functions
| _REG_ (DMA_TIMER0_OFFSET) io_rw_32 timer[4]
| _REG_ (DMA_MULTI_CHAN_TRIGGER_OFFSET) io_wo_32 multi_channel_trigger
| _REG_ (DMA_SNIFF_CTRL_OFFSET) io_rw_32 sniff_ctrl
| _REG_ (DMA_SNIFF_DATA_OFFSET) io_rw_32 sniff_data
| _REG_ (DMA_FIFO_LEVELS_OFFSET) io_ro_32 fifo_levels
| _REG_ (DMA_CHAN_ABORT_OFFSET) io_wo_32 abort
| _REG_ (DMA_TIMER0_OFFSET) io_rw_32 timer[4]
| _REG_ (DMA_MULTI_CHAN_TRIGGER_OFFSET) io_wo_32 multi_channel_trigger
| _REG_ (DMA_SNIFF_CTRL_OFFSET) io_rw_32 sniff_ctrl
| _REG_ (DMA_SNIFF_DATA_OFFSET) io_rw_32 sniff_data
| _REG_ (DMA_FIFO_LEVELS_OFFSET) io_ro_32 fifo_levels
| _REG_ (DMA_CHAN_ABORT_OFFSET) io_wo_32 abort
| _REG_ (DMA_N_CHANNELS_OFFSET) io_ro_32 n_channels
| _REG_ (DMA_SECCFG_CH0_OFFSET) io_rw_32 seccfg_ch[16]
| _REG_ (DMA_SECCFG_IRQ0_OFFSET) io_rw_32 seccfg_irq[4]
| _REG_ (DMA_SECCFG_MISC_OFFSET) io_rw_32 seccfg_misc
| _REG_ (DMA_MPU_CTRL_OFFSET) io_rw_32 mpu_ctrl

## Data Fields
dma_channel_hw_t | ch [12]
uint32_t | _pad0 [64]
union {
struct {
uint32_t __pad0
} |
dma_irq_ctrl_hw_t irq_ctrl [2]
}; |
uint32_t | _pad1
union {
struct {
uint32_t __pad0
uint32_t __pad1
uint32_t __pad2
} |
dma_irq_ctrl_hw_t irq_ctrl [4]
}; |
uint32_t | _pad2 [11]
dma_mpu_region_hw_t | mpu_region [8]

The documentation for this struct was generated from the following files:

- include/hardware/structs/dma.h
- include/hardware/structs/dma.h