v2.0.0
irq.h
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1/*
2 * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#ifndef _HARDWARE_IRQ_H
8#define _HARDWARE_IRQ_H
9
10// These two config items are also used by assembler, so keeping separate
11// PICO_CONFIG: PICO_MAX_SHARED_IRQ_HANDLERS, Maximum number of shared IRQ handlers, default=4, advanced=true, group=hardware_irq
12#ifndef PICO_MAX_SHARED_IRQ_HANDLERS
13#define PICO_MAX_SHARED_IRQ_HANDLERS 4
14#endif
15
16// PICO_CONFIG: PICO_DISABLE_SHARED_IRQ_HANDLERS, Disable shared IRQ handlers, type=bool, default=0, group=hardware_irq
17#ifndef PICO_DISABLE_SHARED_IRQ_HANDLERS
18#define PICO_DISABLE_SHARED_IRQ_HANDLERS 0
19#endif
20
21// PICO_CONFIG: PICO_VTABLE_PER_CORE, user is using separate vector tables per core, type=bool, default=0, group=hardware_irq
22#ifndef PICO_VTABLE_PER_CORE
23#define PICO_VTABLE_PER_CORE 0
24#endif
25
26#ifndef __ASSEMBLER__
27
28#include "pico.h"
29#include "hardware/address_mapped.h"
30#include "hardware/regs/intctrl.h"
31
32#include "pico/platform/cpu_regs.h"
33
161// PICO_CONFIG: PICO_DEFAULT_IRQ_PRIORITY, Define the default IRQ priority, default=0x80, group=hardware_irq
162#ifndef PICO_DEFAULT_IRQ_PRIORITY
163#define PICO_DEFAULT_IRQ_PRIORITY 0x80
164#endif
165
166#define PICO_LOWEST_IRQ_PRIORITY 0xff
167#define PICO_HIGHEST_IRQ_PRIORITY 0x00
168
169// PICO_CONFIG: PICO_SHARED_IRQ_HANDLER_DEFAULT_ORDER_PRIORITY, Set default shared IRQ order priority, default=0x80, group=hardware_irq
170#ifndef PICO_SHARED_IRQ_HANDLER_DEFAULT_ORDER_PRIORITY
171#define PICO_SHARED_IRQ_HANDLER_DEFAULT_ORDER_PRIORITY 0x80
172#endif
173
174#define PICO_SHARED_IRQ_HANDLER_HIGHEST_ORDER_PRIORITY 0xff
175#define PICO_SHARED_IRQ_HANDLER_LOWEST_ORDER_PRIORITY 0x00
176
177// PICO_CONFIG: PARAM_ASSERTIONS_ENABLED_HARDWARE_IRQ, Enable/disable assertions in the hardware_irq module, type=bool, default=0, group=hardware_irq
178#ifndef PARAM_ASSERTIONS_ENABLED_HARDWARE_IRQ
179#ifdef PARAM_ASSERTIONS_ENABLED_IRQ // backwards compatibility with SDK < 2.0.0
180#define PARAM_ASSERTIONS_ENABLED_HARDWARE_IRQ PARAM_ASSERTIONS_ENABLED_IRQ
181#else
182#define PARAM_ASSERTIONS_ENABLED_HARDWARE_IRQ 0
183#endif
184#endif
185
186#ifdef __cplusplus
187extern "C" {
188#endif
189
195 typedef void (*irq_handler_t)(void);
196
197static inline void check_irq_param(__unused uint num) {
198 invalid_params_if(HARDWARE_IRQ, num >= NUM_IRQS);
199}
200
221void irq_set_priority(uint num, uint8_t hardware_priority);
222
244uint irq_get_priority(uint num);
245
252void irq_set_enabled(uint num, bool enabled);
253
260bool irq_is_enabled(uint num);
261
268void irq_set_mask_enabled(uint32_t mask, bool enabled);
269
277void irq_set_mask_n_enabled(uint n, uint32_t mask, bool enabled);
278
293void irq_set_exclusive_handler(uint num, irq_handler_t handler);
294
306 irq_handler_t irq_get_exclusive_handler(uint num);
307
332void irq_add_shared_handler(uint num, irq_handler_t handler, uint8_t order_priority);
333
350void irq_remove_handler(uint num, irq_handler_t handler);
351
358bool irq_has_shared_handler(uint num);
359
367 irq_handler_t irq_get_vtable_handler(uint num);
368
378 static inline void irq_clear(uint int_num) {
379#if PICO_RP2040
380 *((volatile uint32_t *) (PPB_BASE + M0PLUS_NVIC_ICPR_OFFSET)) = (1u << ((uint32_t) (int_num & 0x1F)));
381#elif defined(__riscv)
382 // External IRQs are not latched, but we should clear the IRQ force bit here
383 hazard3_irqarray_clear(RVCSR_MEIFA_OFFSET, int_num / 16, 1u << (int_num % 16));
384#else
385 nvic_hw->icpr[int_num/32] = 1 << (int_num % 32);
386#endif
387}
388
396void irq_set_pending(uint num);
397
398
403void runtime_init_per_core_irq_priorities(void);
404
405static __force_inline void irq_init_priorities(void) {
406 runtime_init_per_core_irq_priorities();
407}
408
421void user_irq_claim(uint irq_num);
422
437void user_irq_unclaim(uint irq_num);
438
452int user_irq_claim_unused(bool required);
453
454/*
455*! \brief Check if a user IRQ is in use on the calling core
456 * \ingroup hardware_irq
457 *
458 * User IRQs starting from FIRST_USER_IRQ are not connected to any hardware, but can be triggered by \ref irq_set_pending.
459 *
460 * \note User IRQs are a core local feature; they cannot be used to communicate between cores. Therefore all functions
461 * dealing with Uer IRQs affect only the calling core
462 *
463 * \param irq_num the irq irq_num
464 * \return true if the irq_num is claimed, false otherwise
465 * \sa user_irq_claim
466 * \sa user_irq_unclaim
467 * \sa user_irq_claim_unused
468 */
469bool user_irq_is_claimed(uint irq_num);
470
471void __unhandled_user_irq(void);
472
473#ifdef __riscv
474enum riscv_vector_num {
475 RISCV_VEC_MACHINE_EXCEPTION = 0,
476 RISCV_VEC_MACHINE_SOFTWARE_IRQ = 3,
477 RISCV_VEC_MACHINE_TIMER_IRQ = 7,
478 RISCV_VEC_MACHINE_EXTERNAL_IRQ = 11,
479};
480
481 irq_handler_t irq_set_riscv_vector_handler(enum riscv_vector_num index, irq_handler_t handler);
482#endif
483
484#if PICO_SECURE
485static inline void irq_assign_to_ns(uint irq_num, bool ns) {
486 check_irq_param(irq_num);
487 if (ns) nvic_hw->itns[irq_num >> 5] |= 1u << (irq_num & 0x1fu);
488 else nvic_hw->itns[irq_num >> 5] &= ~(1u << (irq_num & 0x1fu));
489}
490#endif
491#ifdef __cplusplus
492}
493#endif
494
495#endif
496#endif
address_mapped.h
irq_is_enabled
bool irq_is_enabled(uint num)
Determine if a specific interrupt is enabled on the executing core.
Definition: irq.c:67
user_irq_unclaim
void user_irq_unclaim(uint irq_num)
Mark a user IRQ as no longer used on the calling core.
Definition: irq.c:679
irq_clear
static void irq_clear(uint int_num)
Clear a specific interrupt on the executing core.
Definition: irq.h:378
irq_set_pending
void irq_set_pending(uint num)
Force an interrupt to be pending on the executing core.
Definition: irq.c:117
irq_get_exclusive_handler
irq_handler_t irq_get_exclusive_handler(uint num)
Get the exclusive interrupt handler for an interrupt on the executing core.
Definition: irq.c:232
irq_get_vtable_handler
irq_handler_t irq_get_vtable_handler(uint num)
Get the current IRQ handler for the specified IRQ from the currently installed hardware vector table ...
Definition: irq.c:214
irq_get_priority
uint irq_get_priority(uint num)
Get specified interrupt's priority.
Definition: irq.c:604
irq_set_enabled
void irq_set_enabled(uint num, bool enabled)
Enable or disable a specific interrupt on the executing core.
Definition: irq.c:61
irq_handler_t
void(* irq_handler_t)(void)
Interrupt handler function type.
Definition: irq.h:195
user_irq_claim
void user_irq_claim(uint irq_num)
Claim ownership of a user IRQ on the calling core.
Definition: irq.c:675
user_irq_claim_unused
int user_irq_claim_unused(bool required)
Claim ownership of a free user IRQ on the calling core.
Definition: irq.c:683
irq_set_priority
void irq_set_priority(uint num, uint8_t hardware_priority)
Set specified interrupt's priority.
Definition: irq.c:587
irq_remove_handler
void irq_remove_handler(uint num, irq_handler_t handler)
Remove a specific interrupt handler for the given irq number on the executing core.
Definition: irq.c:470
irq_set_mask_n_enabled
void irq_set_mask_n_enabled(uint n, uint32_t mask, bool enabled)
Enable/disable multiple interrupts on the executing core.
Definition: irq.c:113
irq_has_shared_handler
bool irq_has_shared_handler(uint num)
Determine if the current handler for the given number is shared.
Definition: irq.c:200
irq_set_mask_enabled
void irq_set_mask_enabled(uint32_t mask, bool enabled)
Enable/disable multiple interrupts on the executing core.
Definition: irq.c:109
irq_add_shared_handler
void irq_add_shared_handler(uint num, irq_handler_t handler, uint8_t order_priority)
Add a shared interrupt handler for an interrupt on the executing core.
Definition: irq.c:356
irq_set_exclusive_handler
void irq_set_exclusive_handler(uint num, irq_handler_t handler)
Set an exclusive interrupt handler for an interrupt on the executing core.
Definition: irq.c:219
__force_inline
#define __force_inline
Attribute to force inlining of a function regardless of optimization level.
Definition: compiler.h:125
runtime_init_per_core_irq_priorities
void runtime_init_per_core_irq_priorities(void)
Perform IRQ priority initialization for the current core.
Definition: irq.c:651
pico.h