| Digital Power Starter Kit 3 Firmware dsPIC33C Boost Converter Voltage Mode Control Example |

dev_boost_pconfig.c
1 /*
2 * File: drv_boost_pconfig.c
3 * Author: M91406
4 *
5 * Created on March 12, 2020, 4:31 PM
6 */
7
8 #if (__XC16_VERSION__ > 2000)
9 #pragma message ("Warning: Library file '" __FILE__ "' has not been tested with the recently selected compiler version")
10 #endif
11
12 #include <xc.h> // include processor files - each processor file is guarded.
13 #include <stdint.h> // include standard integer types header file
14 #include <stdbool.h> // include standard boolean types header file
15
16 #include "dev_boost_pconfig.h"
17 #include "dev_boost_templates.h"
18
19 /* PRIVATE VARIABLES */
25 volatile uint16_t adcore_mask=0;
26
32 volatile uint16_t adcore_diff_mask=0;
33
34 /* PRIVATE FUNCTION CALL PROTOTYPES */
35
36 volatile uint16_t boostGPIO_PrivateInitialize(volatile struct BOOST_GPIO_INSTANCE_s* boostGPIOInstance);
37
38 /*******************************************************************************
39 * @fn uint16_t boostPWM_ModuleInitialize(volatile struct BOOST_CONVERTER_s* boostInstance)
40 * @ingroup lib-layer-boost-pconfig-functions
41 * @brief Initializes the boost PWM module by resetting its registers to default
42 * @param boostInstance Pointer to a Boost Converter data object of type struct BOOST_CONVERTER_s
43 * @return unsigned integer (0=failure, 1=success)
44 *
45 * @details
46 * This function initializes the boost PWM module base registers with default
47 * values for maximum performance.
48 *
49 * Default configuration:
50 * - all PWM peripheral power is enabled
51 * - all PWM generators are disabled
52 * - default PWM Module configurations are written in boost PWM module base registers
53 *********************************************************************************/
54 volatile uint16_t boostPWM_ModuleInitialize(volatile struct BOOST_CONVERTER_s* boostInstance)
55 {
56 volatile uint16_t retval=1;
57 volatile struct P33C_PWM_MODULE_s* pwm;
58
59 // Make sure power to the peripheral is enabled
60 volatile bool _pmdlock = PMDCONbits.PMDLOCK; // Copy state of PMD lock bit
61 PMDCONbits.PMDLOCK = 0; // Unlock PMD register writes
62 PMD1bits.PWMMD = 0; // PWM Module Disable: PWM module is enabled
63 PMDCONbits.PMDLOCK = _pmdlock; // set previous state of PMD lock
64
65 // DISABLE ALL PWM GENERATORS
66 PG1CONLbits.ON = 0; // PWM Generator #1 Enable: PWM Generator is not enabled
67 PG2CONLbits.ON = 0; // PWM Generator #2 Enable: PWM Generator is not enabled
68 PG3CONLbits.ON = 0; // PWM Generator #3 Enable: PWM Generator is not enabled
69 PG4CONLbits.ON = 0; // PWM Generator #4 Enable: PWM Generator is not enabled
70
71 #if defined (PG5CONL)
72 PG5CONLbits.ON = 0; // PWM Generator #5 Enable: PWM Generator is not enabled
73 #endif
74 #if defined (PG6CONL)
75 PG6CONLbits.ON = 0; // PWM Generator #6 Enable: PWM Generator is not enabled
76 #endif
77 #if defined (PG7CONL)
78 PG7CONLbits.ON = 0; // PWM Generator #7 Enable: PWM Generator is not enabled
79 #endif
80 #if defined (PG8CONL)
81 PG8CONLbits.ON = 0; // PWM Generator #8 Enable: PWM Generator is not enabled
82 #endif
83
84 // Write default PWM Module configuration to PWM module base registers
85 pwm = p33c_PwmModule_GetHandle();
86 retval &= p33c_PwmModule_ConfigWrite(boostPwmModuleConfig);
87
88 // If boost converter has been configured in MASTER PERIOD mode
89 if (boostInstance->sw_node[0].master_period_enable) // If master period mode is enabled...
90 pwm->vMPER.value = boostInstance->sw_node[0].period; // Set Period of phase #1
91
92 return(retval);
93 }
94
95 /*******************************************************************************
96 * @fn uint16_t boostPWM_ChannelInitialize(volatile struct BOOST_CONVERTER_s* boostInstance)
97 * @ingroup lib-layer-boost-pconfig-functions
98 * @brief This function initializes the output pins for the PWM output and the default boost PWM settings
99 * @param boostInstance Pointer to a Boost Converter data object of type struct BOOST_CONVERTER_s
100 * @return unsigned integer (0=failure, 1=success)
101 *
102 * @details
103 * This function initializes the boost PWM channel with default values for maximum performance.
104 *
105 * Default configuration:
106 * - selected PWM outputs are enabled
107 * - PWM timing settings are loaded (i.e., duty cycle, period, dead-times, blanking)
108 * - PWM synchronization is established
109 *********************************************************************************/
110 volatile uint16_t boostPWM_ChannelInitialize(volatile struct BOOST_CONVERTER_s* boostInstance)
111 {
112 volatile uint16_t retval=1;
113 volatile uint16_t _i=0;
114
115 volatile struct P33C_GPIO_INSTANCE_s* gpio;
116 volatile struct P33C_PWM_GENERATOR_s* pg;
117 volatile uint16_t pwm_Instance;
118 volatile uint16_t gpio_Instance;
119
120 for (_i=0; _i<boostInstance->set_values.no_of_phases; _i++) {
121
122 // LOAD PERIPHERAL INSTANCES FROM BOOST CONVERTER OBJECT
123 pwm_Instance = boostInstance->sw_node[_i].pwm_instance;
124 gpio_Instance = boostInstance->sw_node[_i].gpio_instance;
125
126 // CAPTURE MEMORY ADDRESS OF GIVEN PWM GENERATOR INSTANCE
127 gpio = p33c_GpioInstance_GetHandle(gpio_Instance);
128
129 // WRITE GPIO CONFIGURATION OF PWM OUTPUT(S)
130 gpio->LATx.value &= ~(0x0001 << boostInstance->sw_node[_i].gpio_high); // Clear PWMxH output LOW
131 gpio->LATx.value &= ~(0x0001 << boostInstance->sw_node[_i].gpio_low); // Clear PWMxL output LOW
132 gpio->TRISx.value &= ~(0x0001 << boostInstance->sw_node[_i].gpio_high); // Clear PWMxH output to OUTPUT
133 gpio->TRISx.value &= ~(0x0001 << boostInstance->sw_node[_i].gpio_low); // Clear PWMxL output to OUTPUT
134 gpio->CNPDx.value |= (0x0001 << boostInstance->sw_node[_i].gpio_high); // Enable intern pull down register (PWM1H)
135 gpio->CNPDx.value |= (0x0001 << boostInstance->sw_node[_i].gpio_low); // Enable intern pull down register (PWM1L)
136
137 // COPY CONFIGURATION FROM TEMPLATE TO PWM GENERATOR x CONTROL REGISTERS
138 pg = p33c_PwmGenerator_GetHandle(pwm_Instance);
139 retval &= p33c_PwmGenerator_ConfigWrite(boostInstance->sw_node[_i].pwm_instance, boostPwmGeneratorConfig);
140
141 // LOAD PWM GENERATOR TIMING SETTINGS FROM BOOST CONVERTER OBJECT
142 pg->PGxCONH.bits.MPERSEL = (uint16_t)boostInstance->sw_node[_i].master_period_enable;
143 pg->PGxCONL.bits.HREN = (uint16_t)boostInstance->sw_node[_i].high_resolution_enable;
144
145 pg->PGxDC.value = boostInstance->sw_node[_i].duty_ratio_min; // PGxDC: PWM GENERATOR x DUTY CYCLE REGISTER
146 pg->PGxPER.value = boostInstance->sw_node[_i].period; // PGxPER: PWM GENERATOR x PERIOD REGISTER
147 pg->PGxDTL.value = boostInstance->sw_node[_i].dead_time_falling; // PGxDTL: PWM GENERATOR x DEAD-TIME REGISTER LOW
148 pg->PGxDTH.value = boostInstance->sw_node[_i].dead_time_rising; // PGxDTH: PWM GENERATOR x DEAD-TIME REGISTER HIGH
149 pg->PGxLEBL.value = boostInstance->sw_node[_i].leb_period; // PWM GENERATOR x LEADING-EDGE BLANKING REGISTER LOW
150
151 // Select if PWMxH/PWMxL pins should be swapped
152 pg->PGxIOCONL.bits.SWAP = boostInstance->sw_node[_i].swap_outputs; // PGxIOCONL: PWM GENERATOR x I/O CONTROL REGISTER LOW -> SWAP: Swap PWM Signals to PWMxH and PWMxL Device Pins bit
153
154 // ToDo: PWM Synchronization needs to be more universaL
155 // PWM synchronization only work within groups of 4 (PG1-PG4 or PG5-PG8)
156 // Multiphase boost converter auto PWM phase synchronization
157 if ((_i == 0) && ((uint16_t)(boostInstance->set_values.no_of_phases) > 1U))
158 { // First phase is always master phase
159 pg->PGxCONH.bits.MSTEN = 1; // Enable Master synchronization mode
160 pg->PGxCONH.bits.SOCS = 0b0000; // Master PWM always triggers itself
161 pg->PGxEVTL.bits.PGTRGSEL = 0b011; // PGxTRIGC is always used as PWM synchronization trigger output
162 pg->PGxTRIGC.value = boostInstance->sw_node[_i+1].phase; // Set phase shift between master phase and first synchronized phase
163 pg->PGxCONH.bits.UPDMOD = 0b001; // Immediate update
164 pg->PGxEVTL.bits.UPDTRG = 0b11; // A write of the PGxTRIGA register automatically sets the UPDATE bit
165 }
166 else if ((0 < _i) && (_i < (boostInstance->set_values.no_of_phases-1)))
167 { // Every synchronized phase is synchronized to previous phase while being master to following
168 pg->PGxCONH.bits.MSTEN = 1; // Enable Master synchronization mode
169 pg->PGxCONH.bits.SOCS = boostInstance->sw_node[_i-1].pwm_instance; // synchronized PWM is always triggered by previous generator while providing trigger for following
170 pg->PGxEVTL.bits.PGTRGSEL = 0b011; // PGxTRIGC is always used as PWM synchronization trigger output
171 pg->PGxTRIGC.value = boostInstance->sw_node[_i+1].phase; // Set phase shift between master phase and first synchronized phase
172 pg->PGxCONH.bits.UPDMOD = 0b011; // Sync immediate update
173 pg->PGxEVTL.bits.UPDTRG = 0; // User must set the UPDREQ bit (PGxSTAT[3]) manually
174 }
175 else if ((0 < _i) && (_i == (boostInstance->set_values.no_of_phases-1)))
176 { // Last phase does not provide any master trigger
177 pg->PGxCONH.bits.MSTEN = 0; // Disable Master synchronization mode
178 pg->PGxCONH.bits.SOCS = boostInstance->sw_node[_i-1].pwm_instance; // synchronized PWM is always triggered by previous generator while providing trigger for following
179 pg->PGxEVTL.bits.PGTRGSEL = 0b000; // EOC is the general trigger output
180 pg->PGxTRIGC.value = 0x0000; // Clear phase shift value
181 pg->PGxCONH.bits.UPDMOD = 0b011; // Sync immediate update
182 pg->PGxEVTL.bits.UPDTRG = 0; // User must set the UPDREQ bit (PGxSTAT[3]) manually
183 }
184 else if (boostInstance->set_values.no_of_phases == 1U)
185 { // This is only a single phase system (no PWM dependencies)
186 pg->PGxCONH.bits.MSTEN = 0; // Disable Master synchronization mode
187 pg->PGxCONH.bits.SOCS = 0b0000; // Master PWM always triggers itself
188 pg->PGxEVTL.bits.PGTRGSEL = 0b011; // PGxTRIGC is always used as PWM synchronization trigger output
189 pg->PGxTRIGC.value = 0x0000; // Clear phase shift between master phase and first synchronized phase
190 pg->PGxCONH.bits.UPDMOD = 0b001; // Immediate update
191 pg->PGxEVTL.bits.UPDTRG = 0b11; // A write of the PGxTRIGA register automatically sets the UPDATE bit
192 }
193 else { /* continue */ }
194
195 // Update PWM generator timing registers
196 pg->PGxSTAT.bits.UPDREQ = 1; // Manually set the Update Request bit
197 pg->PGxCONH.bits.TRGMOD = 1; // all PWM generators are in retriggerable mode
198
199 }
200
201 return(retval);
202 }
203
204 /*******************************************************************************
205 * @fn uint16_t boostPWM_Start(volatile struct BOOST_CONVERTER_s* boostInstance)
206 * @ingroup lib-layer-boost-pconfig-functions
207 * @brief This function enables the boost PWM operation
208 * @param boostInstance Pointer to a Boost Converter data object of type struct BOOST_CONVERTER_s
209 * @return unsigned integer (0=failure, 1=success)
210 *
211 * @details
212 * This function starts the operation of the boost PWM by enabling the PWM
213 * generator and its output pins.
214 *********************************************************************************/
215 volatile uint16_t boostPWM_Start(volatile struct BOOST_CONVERTER_s* boostInstance)
216 {
217 volatile uint16_t retval=1;
218 volatile uint16_t _i=0;
219 volatile uint16_t timeout=0;
220 volatile uint16_t pwm_Instance=0;
221 volatile uint16_t sync_sw_mask=0;
222 volatile struct P33C_PWM_GENERATOR_s* pg;
223
224 // Enable all PWM channels of the recent boost converter configuration
225 for(_i=0; _i< boostInstance->set_values.no_of_phases; _i++) {
226
227 // Capture PWM instance of the recent channel
228 pwm_Instance = boostInstance->sw_node[_i].pwm_instance;
229
230 // CAPTURE MEMORY ADDRESS OF GIVEN PWM GENERATOR INSTANCE
231 pg = p33c_PwmGenerator_GetHandle(pwm_Instance);
232
233 pg->PGxIOCONL.value |= P33C_PGxIOCONL_OVREN_SYNC; // PWMxH/L Output Override Enable: PWM generator controls the PWMxH output pin
234 pg->PGxIOCONH.value &= ~(P33C_PGxIOCONH_PEN_SYNC); // PWMxH/L Output Port Disable: PWM generator controls the PWMxH output pin
235
236 pg->PGxCONL.bits.ON = 1; // PWM Generator Enable: PWM Generator is enabled
237 pg->PGxSTAT.bits.UPDREQ = 1; // Update all PWM timing registers
238
239 if(pg->PGxCONL.value & P33C_PGxCONL_HRES_EN) // If high resolution is enabled
240 {
241 while((!PCLKCONbits.HRRDY) && (timeout++ < 5000)); // wait for high resolution to get ready
242 if ((timeout >= 5000) || (PCLKCONbits.HRERR)) // if there is an error ...
243 return(0); // ... exit returning ERROR
244 }
245
246 // Select the control bits for either synchronous or asynchronous PWM drive
247 // note: swapping PWMs changes H/L assignments and the 'active' pin has to
248 // selected in asynchronous mode
249 if (boostInstance->sw_node[_i].sync_drive)
250 sync_sw_mask = P33C_PGxIOCONH_PEN_SYNC;
251 else
252 {
253 if (boostInstance->sw_node[_i].swap_outputs)
254 sync_sw_mask = P33C_PGxIOCONH_PEN_ASYNC_SWAP;
255 else
256 sync_sw_mask = P33C_PGxIOCONH_PEN_ASYNC;
257 }
258
259 // PWMxH/L Output Port Enable: PWM generator controls the PWMxH output pin
260 pg->PGxIOCONH.value |= sync_sw_mask;
261
262 // Turn on PWM generator
263 retval &= (volatile uint16_t)(pg->PGxCONL.bits.ON);
264
265 }
266
267 return(retval);
268 }
269
270 /*******************************************************************************
271 * @fn uint16_t boostPWM_Stop(volatile struct BOOST_CONVERTER_s* boostInstance)
272 * @ingroup lib-layer-boost-pconfig-functions
273 * @brief This function stops the boost PWM output
274 * @param boostInstance Pointer to a Boost Converter data object of type struct BOOST_CONVERTER_s
275 * @return unsigned integer (0=failure, 1=success)
276 *
277 * @details
278 * This function shuts down the PWM output by disabling all PWM channels of the recent boost
279 * converter object, overriding the output pins and resetting the boost PWM duty cycle to
280 * its minimum duty ratio.
281 *
282 * If the Power Good output is enabled, this output pin will also be reset.
283 *********************************************************************************/
284 volatile uint16_t boostPWM_Stop(volatile struct BOOST_CONVERTER_s* boostInstance)
285 {
286 volatile uint16_t retval=1;
287 volatile uint16_t _i=0;
288 volatile uint16_t pwm_Instance=0;
289 volatile struct P33C_PWM_GENERATOR_s* pg;
290
291 // Disable all PWM channels of the recent boost converter configuration
292 for(_i=0; _i< boostInstance->set_values.no_of_phases; _i++) {
293
294 // Capture PWM instance of the recent channel
295 pwm_Instance = boostInstance->sw_node[_i].pwm_instance;
296
297 // CAPTURE MEMORY ADDRESS OF GIVEN PWM GENERATOR INSTANCE
298 pg = p33c_PwmGenerator_GetHandle(pwm_Instance);
299
300 pg->PGxIOCONL.value |= P33C_PGxIOCONL_OVREN_SYNC; // PWMxH/L Output Override Enable
301 pg->PGxIOCONH.value &= ~(P33C_PGxIOCONH_PEN_SYNC); // PWMxH/L Output Pint Control Disable
302 pg->PGxCONL.value &= ~(P33C_PGxCONL_PWM_ON); // PWM Generator Disable
303 pg->PGxDC.value = boostInstance->sw_node[_i].duty_ratio_min; // Reset Duty Cycle
304 pg->PGxSTAT.value |= P33C_PGxSTAT_UPDREQ; // Set the Update Request bit to update PWM timing
305
306 retval &= (volatile uint16_t)((volatile bool)(pg->PGxCONL.bits.ON == 0));
307
308 }
309
310 // If defined, reset POWER_GOOD output
311 if(boostInstance->gpio.PowerGood.enabled)
312 retval &= boostGPIO_Clear(&boostInstance->gpio.PowerGood);
313
314 return(retval);
315
316 }
317
318 /*******************************************************************************
319 * @fn uint16_t boostPWM_Suspend(volatile struct BOOST_CONVERTER_s* boostInstance)
320 * @ingroup lib-layer-boost-pconfig-functions
321 * @brief This function disables the PWM generator IOs
322 * @param boostInstance Pointer to a Boost Converter data object of type struct BOOST_CONVERTER_s
323 * @return unsigned integer (0=failure, 1=success)
324 *
325 * @details
326 * This function suspends the boost PWM operation by disabling all PWM outputs of the recent
327 * boost converter configuration, overriding the PWM output pins and setting the
328 * duty cycle to 0.
329 *********************************************************************************/
330 volatile uint16_t boostPWM_Suspend(volatile struct BOOST_CONVERTER_s* boostInstance)
331 {
332 volatile uint16_t retval=1;
333 volatile uint16_t _i=0;
334 volatile uint16_t pwm_Instance;
335 volatile struct P33C_PWM_GENERATOR_s* pg;
336
337 // Disable all PWM outputs of the recent boost converter configuration
338 for(_i=0; _i< boostInstance->set_values.no_of_phases; _i++) {
339
340 // Capture PWM instance of the recent channel
341 pwm_Instance = boostInstance->sw_node[_i].pwm_instance;
342
343 // CAPTURE MEMORY ADDRESS OF GIVEN PWM GENERATOR INSTANCE
344 pg = p33c_PwmGenerator_GetHandle(pwm_Instance);
345
346 pg->PGxIOCONL.value |= P33C_PGxIOCONL_OVREN_SYNC; // PWMxH/L Output Override Enable
347 pg->PGxDC.value = 0; // Reset Duty Cycle
348 pg->PGxSTAT.value |= P33C_PGxSTAT_UPDREQ; // Set the Update Request bit to update PWM timing
349
350 retval &= (bool)(pg->PGxIOCONL.value & P33C_PGxIOCONL_OVREN_SYNC);
351
352 }
353
354 // If defined and enabled, reset POWER_GOOD output
355 if(boostInstance->gpio.PowerGood.enabled)
356 retval &= boostGPIO_Clear(&boostInstance->gpio.PowerGood);
357
358 return(retval);
359
360 }
361
362 /*******************************************************************************
363 * @fn uint16_t boostPWM_Resume(volatile struct BOOST_CONVERTER_s* boostInstance)
364 * @ingroup lib-layer-boost-pconfig-functions
365 * @brief This function resumes the boost PWM operation
366 * @param boostInstance Pointer to a Boost Converter data object of type struct BOOST_CONVERTER_s
367 * @return unsigned integer (0=failure, 1=success)
368 *
369 * @details
370 * THis function updates the PWM timing bit and the PWM output pins are enabled.
371 *********************************************************************************/
372 volatile uint16_t boostPWM_Resume(volatile struct BOOST_CONVERTER_s* boostInstance)
373 {
374 volatile uint16_t retval=1;
375 volatile uint16_t _i=0;
376 volatile bool sync_mode=false;
377 volatile uint16_t pwm_Instance=0;
378 volatile uint16_t sync_sw_mask=0;
379 volatile struct P33C_PWM_GENERATOR_s* pg;
380
381 // Disable all PWM channels of the recent boost converter configuration
382 for(_i=0; _i< boostInstance->set_values.no_of_phases; _i++) {
383
384 // Capture PWM instance of the recent channel
385 pwm_Instance = (uint16_t)boostInstance->sw_node[_i].pwm_instance;
386
387 // CAPTURE MEMORY ADDRESS OF GIVEN PWM GENERATOR INSTANCE
388 pg = p33c_PwmGenerator_GetHandle(pwm_Instance);
389
390 // Select the control bits for either synchronous or asynchronous PWM drive
391 sync_mode = boostInstance->sw_node[_i].sync_drive;
392 sync_mode &= (~boostInstance->status.bits.async_mode);
393
394 // Select which pins should be enabled based on sync or async mode
395 // note: swapping PWMs does not change the H/L assignment. When swapped,
396 // OVRENH will control the PWMxL pin and vice versa
397 if (sync_mode)
398 { sync_sw_mask = P33C_PGxIOCONL_OVREN_SYNC; }
399 else
400 {
401 if (boostInstance->sw_node[_i].swap_outputs)
402 sync_sw_mask = P33C_PGxIOCONL_OVREN_ASYNC_SWAP;
403 else
404 sync_sw_mask = P33C_PGxIOCONL_OVREN_ASYNC;
405 }
406
407 // Clear selected override bits
408 pg->PGxSTAT.bits.UPDREQ = 1; // Set the Update Request bit to update PWM timing
409 pg->PGxIOCONL.value &= (volatile uint16_t)(~(sync_sw_mask)); // PWMxH/L Output Override Disable
410
411 retval &= (uint16_t)((bool)(!(pg->PGxIOCONL.value & sync_sw_mask)));
412
413 }
414
415 return(retval);
416
417 }
418
419 /*******************************************************************************
420 * @fn uint16_t boostADC_ModuleInitialize(void)
421 * @ingroup lib-layer-boost-pconfig-functions
422 * @brief This fucntion initializes the boost by resetting all its registers to default
423 * @param void
424 * @return unsigned integer (0=failure, 1=success)
425 *
426 * @details
427 * The ADC initialization covers basic configurations like data format, clock sources and dividers
428 * as well as specific configurations for ADC cores. These settings are general, basic settings
429 * and not related to specific analog inputs. The standard configuration set here sets up the
430 * ADC module and ADC cores for maximum performance.
431 *********************************************************************************/
432 volatile uint16_t boostADC_ModuleInitialize(void)
433 {
434 volatile uint16_t retval=1;
435
436 // Make sure power to peripheral is enabled
437 volatile bool _pmdlock = PMDCONbits.PMDLOCK; // Copy state of PMD lock bit
438 PMDCONbits.PMDLOCK = 0; // Unlock PMD register writes
439 PMD1bits.ADC1MD = 0; // ADC Module Power Disable: ADC module power is enabled
440 PMDCONbits.PMDLOCK = _pmdlock; // set previous state of PMD lock
441
442 // ADCON1L: ADC CONTROL REGISTER 1 LOW
443 ADCON1Lbits.ADON = 0; // ADC Enable: ADC module is off during configuration
444 ADCON1Lbits.ADSIDL = 0; // ADC Stop in Idle Mode: Continues module operation in Idle mode
445
446 // ADCON1H: ADC CONTROL REGISTER 1 HIGH
447 ADCON1Hbits.SHRRES = 0b11; // Shared ADC Core Resolution Selection: 12-bit resolution ADC resolution = 12-bit (0...4095 ticks)
448 ADCON1Hbits.FORM = 0; // Fractional Data Output Format: Integer
449
450 // ADCON2L: ADC CONTROL REGISTER 2 LOW
451 ADCON2Lbits.REFCIE = 0;; // Band Gap and Reference Voltage Ready Common Interrupt Enable: Common interrupt is disabled for the band gap ready event
452 ADCON2Lbits.REFERCIE = 0; // Band Gap or Reference Voltage Error Common Interrupt Enable: Disabled
453 ADCON2Lbits.EIEN = 1; // Early Interrupts Enable: The early interrupt feature is enabled
454 ADCON2Lbits.SHREISEL = 0b111; // Shared Core Early Interrupt Time Selection: Early interrupt is set and interrupt is generated 8 TADCORE clocks prior to when the data are ready
455 ADCON2Lbits.SHRADCS = 0b0000001; // Shared ADC Core Input Clock Divider: 2:1 (minimum)
456
457 // ADCON2H: ADC CONTROL REGISTER 2 HIGH
458 ADCON2Hbits.SHRSAMC = 8; // Shared ADC Core Sample Time Selection: 8x TADs sampling time
459 ADCON2Hbits.REFERR = 0; // reset error flag
460 ADCON2Hbits.REFRDY = 0; // reset bandgap status bit
461
462 // ADCON3L: ADC CONTROL REGISTER 3 LOW
463 ADCON3Lbits.REFSEL = 0b000; // ADC Reference Voltage Selection: AVDD-toAVSS
464 ADCON3Lbits.SUSPEND = 0; // All ADC Core Triggers Disable: All ADC cores can be triggered
465 ADCON3Lbits.SUSPCIE = 0; // Suspend All ADC Cores Common Interrupt Enable: Common interrupt is not generated for suspend ADC cores
466 ADCON3Lbits.SUSPRDY = 0; // All ADC Cores Suspended Flag: ADC cores have previous conversions in progress
467 ADCON3Lbits.SHRSAMP = 0; // Shared ADC Core Sampling Direct Control: use hardware trigger
468 ADCON3Lbits.CNVRTCH = 0; // Software Individual Channel Conversion Trigger: Next individual channel conversion trigger can be generated (not used)
469 ADCON3Lbits.SWLCTRG = 0; // Software Level-Sensitive Common Trigger: No software, level-sensitive common triggers are generated (not used)
470 ADCON3Lbits.SWCTRG = 0; // Software Common Trigger: Ready to generate the next software common trigger (not used)
471 ADCON3Lbits.CNVCHSEL = 0; // Channel Number Selection for Software Individual Channel Conversion Trigger: AN0 (not used)
472
473 // ADCON3H: ADC CONTROL REGISTER 3 HIGH
474 ADCON3Hbits.CLKSEL = 0b01; // ADC Module Clock Source Selection: AVCODIV
475 ADCON3Hbits.CLKDIV = 0b000000; // ADC Module Clock Source Divider: 1 Source Clock Period
476 ADCON3Hbits.SHREN = 0; // Shared ADC Core Enable: Shared ADC core is disabled
477 ADCON3Hbits.C0EN = 0; // Dedicated ADC Core 0 Enable: Dedicated ADC Core 0 is disabled
478 ADCON3Hbits.C1EN = 0; // Dedicated ADC Core 1 Enable: Dedicated ADC Core 1 is disabled
479
480 // ADCON4L: ADC CONTROL REGISTER 4 LOW
481 ADCON4Lbits.SAMC0EN = 0; // Dedicated ADC Core 0 Conversion Delay Enable: Immediate conversion
482 ADCON4Lbits.SAMC1EN = 0; // Dedicated ADC Core 1 Conversion Delay Enable: Immediate conversion
483
484 // ADCON4H: ADC CONTROL REGISTER 4 HIGH
485 ADCON4Hbits.C0CHS = 0b00; // Dedicated ADC Core 0 Input Channel Selection: AN0
486 ADCON4Hbits.C1CHS = 0b00; // Dedicated ADC Core 1 Input Channel Selection: AN1
487
488 // ADCON5L: ADC CONTROL REGISTER 5 LOW
489 // ADCON5Lbits.SHRRDY: Shared ADC Core Ready Flag (read only)
490 // ADCON5Lbits.C0RDY: Dedicated ADC Core 0 Ready Flag (read only)
491 // ADCON5Lbits.C1RDY: Dedicated ADC Core 1 Ready Flag (read only)
492 ADCON5Lbits.SHRPWR = 0; // Shared ADC Core Power Enable: ADC core is off
493 ADCON5Lbits.C0PWR = 0; // Dedicated ADC Core 0 Power Enable: ADC core is off
494 ADCON5Lbits.C1PWR = 0; // Dedicated ADC Core 1 Power Enable: ADC core is off
495
496 // ADCON5H: ADC CONTROL REGISTER 5 HIGH
497 ADCON5Hbits.WARMTIME = 0b1111; // ADC Dedicated Core x Power-up Delay: 32768 Source Clock Periods
498 ADCON5Hbits.SHRCIE = 0; // Shared ADC Core Ready Common Interrupt Enable: Common interrupt is disabled for an ADC core ready event
499 ADCON5Hbits.C0CIE = 0; // C1CIE: Dedicated ADC Core 0 Ready Common Interrupt Enable: Common interrupt is disabled
500 ADCON5Hbits.C1CIE = 0; // C1CIE: Dedicated ADC Core 1 Ready Common Interrupt Enable: Common interrupt is disabled
501
502 // ADCORExL: DEDICATED ADC CORE x CONTROL REGISTER LOW
503 ADCORE1Lbits.SAMC = 0b0000000000; // Dedicated ADC Core 1 Conversion Delay Selection: 2 TADCORE (minimum)
504 ADCORE0Lbits.SAMC = 0b0000000000; // Dedicated ADC Core 0 Conversion Delay Selection: 2 TADCORE (minimum)
505
506 // ADCORExH: DEDICATED ADC CORE x CONTROL REGISTER HIGH
507 ADCORE0Hbits.RES = 0b11; // ADC Core x Resolution Selection: 12 bit
508 ADCORE0Hbits.ADCS = 0b0000000; // ADC Core x Input Clock Divider: 2 Source Clock Periods
509 ADCORE0Hbits.EISEL = 0b111; // Early interrupt is set and an interrupt is generated 8 TADCORE clocks prior
510
511 ADCORE1Hbits.RES = 0b11; // ADC Core x Resolution Selection: 12 bit
512 ADCORE1Hbits.ADCS = 0b0000000; // ADC Core x Input Clock Divider: 2 Source Clock Periods
513 ADCORE1Hbits.EISEL = 0b111; // Early interrupt is set and an interrupt is generated 8 TADCORE clocks prior
514
515 return(retval);
516
517 }
518
519 /*******************************************************************************
520 * @fn uint16_t boostADC_ChannelInitialize(volatile struct BOOST_ADC_INPUT_SETTINGS_s* adcInstance)
521 * @ingroup lib-layer-boost-pconfig-functions
522 * @brief This function initializes the settings for the ADC channel
523 * @param adcInstance Pointer to an ADC Input Configuration data object of type struct BOOST_ADC_INPUT_SETTINGS_s
524 * @return unsigned integer (0=failure, 1=success)
525 *
526 * @details
527 * This function initializes the ADC input registers based on the selected ADC channel.
528 * This function sets the input channel trigger source, input mode, and the ADC core
529 * connected to the selected channel.
530 *********************************************************************************/
531 volatile uint16_t boostADC_ChannelInitialize(volatile struct BOOST_ADC_INPUT_SETTINGS_s* adcInstance)
532 {
533 volatile uint16_t retval=1;
534 volatile uint8_t* ptrADCRegister;
535 volatile uint8_t bit_offset;
536
537 // Initialize ADC input registers
538 if (adcInstance->enabled) {
539
540 // Write level trigger setting
541 if (adcInstance->adc_input < 16) {
542 ADLVLTRGL |= ((uint16_t)(adcInstance->level_trigger) << adcInstance->adc_input);
543 ADEIEL |= ((uint16_t)(adcInstance->early_interrupt_enable) << adcInstance->adc_input);
544 ADIEL |= ((uint16_t)(adcInstance->interrupt_enable) << adcInstance->adc_input);
545 }
546 else if (adcInstance->adc_input < 32) {
547 ADLVLTRGH |= ((uint16_t)(adcInstance->level_trigger) << (adcInstance->adc_input - 16));
548 ADEIEH |= ((uint16_t)(adcInstance->early_interrupt_enable) << (adcInstance->adc_input - 16));
549 ADIEH |= ((uint16_t)(adcInstance->interrupt_enable) << (adcInstance->adc_input - 16));
550 }
551 else {
552 return(0); // ADC input number out of range
553 }
554
555 // write input mode setting
556 if (adcInstance->adc_input < 8)
557 bit_offset = (2 * adcInstance->adc_input);
558 else if (adcInstance->adc_input < 16)
559 bit_offset = (2 * (adcInstance->adc_input-8));
560 else if (adcInstance->adc_input < 24)
561 bit_offset = (2 * (adcInstance->adc_input-16));
562 else if (adcInstance->adc_input < 32)
563 bit_offset = (2 * (adcInstance->adc_input-24));
564 else
565 return(0); // ADC input number out of range
566
567 ptrADCRegister = (volatile uint8_t *)
568 ((volatile uint8_t *)&ADMOD0L + (volatile uint8_t)(adcInstance->adc_input >> 8));
569
570 *ptrADCRegister |= ((unsigned int)adcInstance->signed_result << bit_offset);
571 *ptrADCRegister |= ((unsigned int)adcInstance->differential_input << (bit_offset + 1));
572
573 // Write ADC trigger source setting
574 ptrADCRegister = (volatile uint8_t *)
575 ((volatile uint8_t *)&ADTRIG0L + (volatile uint8_t)adcInstance->adc_input);
576
577 *ptrADCRegister = (volatile uint8_t)adcInstance->trigger_source;
578
579 // Register ADC core to be active
580 switch (adcInstance->adc_core) {
581 case 0:
582 adcore_mask |= ADC_CORE0_MASK_INDEX;
583 if (adcInstance->differential_input)
584 adcore_diff_mask |= ADC_CORE0_MASK_INDEX;
585 break;
586 case 1:
587 adcore_mask |= ADC_CORE1_MASK_INDEX;
588 if (adcInstance->differential_input)
589 adcore_diff_mask |= ADC_CORE1_MASK_INDEX;
590 break;
591 case 2:
592 adcore_mask |= ADC_CORE2_MASK_INDEX;
593 if (adcInstance->differential_input)
594 adcore_diff_mask |= ADC_CORE2_MASK_INDEX;
595 break;
596 case 3:
597 adcore_mask |= ADC_CORE3_MASK_INDEX;
598 if (adcInstance->differential_input)
599 adcore_diff_mask |= ADC_CORE3_MASK_INDEX;
600 break;
601 default:
602 adcore_mask |= ADC_SHRCORE_MASK_INDEX;
603 if (adcInstance->differential_input)
604 adcore_diff_mask |= ADC_SHRCORE_MASK_INDEX;
605 break;
606 }
607
608 }
609
610 return(retval);
611
612 }
613
614 /*******************************************************************************
615 * @fn uint16_t boostADC_Start(void)
616 * @ingroup lib-layer-boost-pconfig-functions
617 * @brief This function enables the ADC module and starts the ADC cores analog inputs for the required input signals
618 * @param void
619 * @return unsigned integer (0=failure, 1=success)
620 *
621 * @details
622 * This function enables the ADC module, powers-up and enables the ADC cores used and waits
623 * until ADC cores are ready.
624 *********************************************************************************/
625 volatile uint16_t boostADC_Start(void)
626 {
627 volatile uint16_t retval=1;
628 volatile uint16_t timeout=0;
629 volatile uint16_t adcore_mask_compare=0;
630
631 // Turn on ADC module
632 ADCON1Lbits.ADON = 1;
633
634 ADCON5L = adcore_mask; // Enable power to all used ADC cores
635 adcore_mask_compare = ((adcore_mask << 8) | adcore_mask); // Set ADC Core Ready Bit Mask
636
637 while ((ADCON5L != adcore_mask_compare) & (timeout++ < ADC_POWERUP_TIMEOUT)); // Wait until ADC cores are ready
638 if (timeout >= ADC_POWERUP_TIMEOUT) return(0); // Skip if powering up ADC cores was unsuccessful
639 ADCON3H = adcore_mask; // Enable ADC cores
640
641
642 return(retval);
643
644 }
645
646 /*******************************************************************************
647 * @fn uint16_t boostGPIO_Set(volatile struct BOOST_GPIO_INSTANCE_s* boostGPIOInstance)
648 * @ingroup lib-layer-boost-pconfig-functions
649 * @brief This function sets the selected general purpose input/ouput pins
650 * @param boostGPIOInstance Pointer to a GPIO instance data object of type struct BOOST_GPIO_INSTANCE_s
651 * @return unsigned integer (0=failure, 1=success)
652 *
653 * @details
654 * This function captures the user selected pin to be activated through LAT register.
655 *********************************************************************************/
656 volatile uint16_t boostGPIO_Set(volatile struct BOOST_GPIO_INSTANCE_s* boostGPIOInstance)
657 {
658 volatile uint16_t retval=1;
659 volatile uint16_t filter_mask=0;
660 volatile struct P33C_GPIO_INSTANCE_s* gpio;
661
662 // Capture register of GPIO port
663 gpio = p33c_GpioInstance_GetHandle(boostGPIOInstance->port);
664
665 // Capture filter mask
666 filter_mask = (0x0001 << boostGPIOInstance->pin);
667
668 // Set pin to ACTIVE state
669 if (boostGPIOInstance->polarity == 0)
670 gpio->LATx.value |= (filter_mask); // Set pin bit in register
671 else
672 gpio->LATx.value &= ~(filter_mask); // Clear pin bit in register
673
674 // Verifying the set state is applied at the pin
675 retval = (bool)((gpio->LATx.value & filter_mask) == (gpio->PORTx.value & filter_mask));
676
677 return(retval);
678
679 }
680
681 /*******************************************************************************
682 * @fn uint16_t boostGPIO_Clear(volatile struct BOOST_GPIO_INSTANCE_s* boostGPIOInstance)
683 * @ingroup lib-layer-boost-pconfig-functions
684 * @brief This function clears the selected general purpose input/output pin
685 * @param boostGPIOInstance Pointer to a GPIO instance data object of type struct BOOST_GPIO_INSTANCE_s
686 * @return unsigned integer (0=failure, 1=success)
687 *
688 * @details
689 * This function captures the pin that the use desired to be put in inactive state.
690 *********************************************************************************/
691 volatile uint16_t boostGPIO_Clear(volatile struct BOOST_GPIO_INSTANCE_s* boostGPIOInstance)
692 {
693 volatile uint16_t retval=1;
694 volatile uint16_t filter_mask=0;
695 volatile struct P33C_GPIO_INSTANCE_s* gpio;
696
697 // Capture register of GPIO port
698 gpio = p33c_GpioInstance_GetHandle(boostGPIOInstance->port);
699
700 // Capture filter mask
701 filter_mask = (0x0001 << boostGPIOInstance->pin);
702
703 // Set pin to INACTIVE state
704 if (boostGPIOInstance->polarity == 0)
705 gpio->LATx.value &= ~(filter_mask); // Clear pin bit in register
706 else
707 gpio->LATx.value |= (filter_mask); // Set pin bit in register
708
709 // Verifying the set state is applied at the pin
710 retval = (bool)((gpio->LATx.value & filter_mask) == (gpio->PORTx.value & filter_mask));
711
712 return(retval);
713
714 }
715
716 /*******************************************************************************
717 * @fn bool boostGPIO_GetPinState(volatile struct BOOST_GPIO_INSTANCE_s* boostGPIOInstance)
718 * @ingroup lib-layer-boost-pconfig-functions
719 * @brief This function gets the state of the selected pin
720 * @param boostGPIOInstance Pointer to a GPIO instance data object of type struct BOOST_GPIO_INSTANCE_s
721 * @return unsigned integer (0=failure, 1=success)
722 *
723 * @details
724 * This function captures the selected pin and read its state.
725 *********************************************************************************/
726 volatile bool boostGPIO_GetPinState(volatile struct BOOST_GPIO_INSTANCE_s* boostGPIOInstance)
727 {
728 volatile bool retval=1;
729 volatile P33C_GPIO_INSTANCE_t* gpio;
730
731 // Capture register of GPIO port
732 gpio = p33c_GpioInstance_GetHandle(boostGPIOInstance->port);
733
734 // Read pin
735 retval = (bool)(gpio->PORTx.value & (0x0001 << boostGPIOInstance->pin));
736
737 // If polarity is inverted (ACTIVE LOW), invert result
738 if(boostGPIOInstance->polarity == 1)
739 retval = (1-retval);
740
741 return(retval);
742
743 }
744
745
746 /*******************************************************************************
747 * @fn uint16_t boostGPIO_Initialize(volatile struct BOOST_CONVERTER_s* boostInstance)
748 * @ingroup lib-layer-boost-pconfig-functions
749 * @brief This function initializes the boost input pins
750 * @param boostInstance Pointer to a Boost Converter data object of type struct BOOST_CONVERTER_s
751 * @return unsigned integer (0=failure, 1=success)
752 *
753 * @details
754 * This function initializes the ENABLE input pin and POWER GOOD output pin using the
755 * boost GPIO_PrivateInitialize (URL = @ref boostGPIO_PrivateInitialize).
756 *********************************************************************************/
757 volatile uint16_t boostGPIO_Initialize(volatile struct BOOST_CONVERTER_s* boostInstance)
758 {
759 volatile uint16_t retval=1;
760
761 // Initialize ENABLE input pin
762 if(boostInstance->gpio.EnableInput.enabled)
763 retval = boostGPIO_PrivateInitialize(&boostInstance->gpio.EnableInput);
764
765 // Initialize POWER GOOD output pin
766 if(boostInstance->gpio.PowerGood.enabled)
767 retval = boostGPIO_PrivateInitialize(&boostInstance->gpio.PowerGood);
768
769 // If defined, reset POWER_GOOD output
770 if(boostInstance->gpio.PowerGood.enabled)
771 retval &= boostGPIO_Clear(&boostInstance->gpio.PowerGood);
772
773 return(retval);
774
775 }
776
777
778 /*******************************************************************************
779 * @fn uint16_t boostGPIO_PrivateInitialize(volatile struct BOOST_GPIO_INSTANCE_s* boostGPIOInstance)
780 * @ingroup lib-layer-boost-pconfig-functions
781 * @brief This function sets the pin as input or output
782 * @param boostGPIOInstance Pointer to a GPIO instance data object of type struct BOOST_GPIO_INSTANCE_s
783 * @return unsigned integer (0=failure, 1=success)
784 *
785 * @details
786 * This function captures the user selected pin then set the pin to inactive and
787 * set it as digital input or output pin.
788 *********************************************************************************/
789 volatile uint16_t boostGPIO_PrivateInitialize(volatile struct BOOST_GPIO_INSTANCE_s* boostGPIOInstance)
790 {
791 volatile uint16_t retval=1;
792 volatile struct P33C_GPIO_INSTANCE_s* gpio;
793
794 // Capture register of GPIO port
795 gpio = p33c_GpioInstance_GetHandle(boostGPIOInstance->port);
796
797 // Set pin to INACTIVE state
798 if (boostGPIOInstance->polarity == 0)
799 gpio->LATx.value &= ~(0x0001 << boostGPIOInstance->pin); // Clear pin bit in register
800 else
801 gpio->LATx.value |= (0x0001 << boostGPIOInstance->pin); // Set pin bit in register
802
803 // Set INPUT or OUTPUT in TRIS register
804 if(boostGPIOInstance->io_type == 1)
805 gpio->TRISx.value |= (0x0001 << boostGPIOInstance->pin); // Set pin bit in register
806 else
807 gpio->TRISx.value &= ~(0x0001 << boostGPIOInstance->pin); // Clear pin bit in register
808
809 // Set Pin in Open Drain Configuration
810 if(boostGPIOInstance->io_type == 2)
811 gpio->ODCx.value |= (0x0001 << boostGPIOInstance->pin); // Set pin bit in register
812 else
813 gpio->ODCx.value &= ~(0x0001 << boostGPIOInstance->pin); // Clear pin bit in register
814
815 // Set pin as DIGITAL IO
816 gpio->ANSELx.value &= ~(0x0001 << boostGPIOInstance->pin); // Clear pin bit in register
817
818 // ToDo: Enable register value testing to validate function result
819 retval = 1;
820
821 return(retval);
822 }
823
824 // end of file
P33C_GPIO_INSTANCE_s::LATx
union P33C_GPIO_INSTANCE_s::@126 LATx
BOOST_ADC_INPUT_SETTINGS_s::trigger_source
volatile uint8_t trigger_source
input channel trigger source
Definition: dev_boost_typedef.h:459
BOOST_SWITCH_NODE_SETTINGS_s::pwm_instance
volatile uint16_t pwm_instance
number of the PWM channel used
Definition: dev_boost_typedef.h:404
P33C_GPIO_INSTANCE_s::value
volatile uint16_t value
Definition: p33c_gpio.h:274
P33C_GPIO_INSTANCE_s::TRISx
union P33C_GPIO_INSTANCE_s::@124 TRISx
BOOST_SWITCH_NODE_SETTINGS_s::dead_time_falling
volatile uint16_t dead_time_falling
Dead time setting at falling edge of a half-bridge drive.
Definition: dev_boost_typedef.h:418
BOOST_SWITCH_NODE_SETTINGS_s::leb_period
volatile uint16_t leb_period
Leading-Edge Blanking period.
Definition: dev_boost_typedef.h:419
BOOST_SWITCH_NODE_SETTINGS_s::swap_outputs
volatile bool swap_outputs
Selecting if PWMxH (default) or PWMxL should be the leading PWM output.
Definition: dev_boost_typedef.h:408
BOOST_SWITCH_NODE_SETTINGS_s::high_resolution_enable
volatile bool high_resolution_enable
Selecting if PWM module should use high-resolution mode.
Definition: dev_boost_typedef.h:410
P33C_PWM_GENERATOR_s::PGxIOCONH
union P33C_PWM_GENERATOR_s::@270 PGxIOCONH
P33C_PWM_GENERATOR_s::PGxPER
union P33C_PWM_GENERATOR_s::@286 PGxPER
adcore_diff_mask
volatile uint16_t adcore_diff_mask
This variable is use to set the ADC core mask.
Definition: dev_boost_pconfig.c:32
BOOST_ADC_INPUT_SETTINGS_s::adc_input
volatile uint8_t adc_input
number of the ADC input channel used
Definition: dev_boost_typedef.h:457
P33C_PWM_GENERATOR_s::PGxEVTL
union P33C_PWM_GENERATOR_s::@271 PGxEVTL
BOOST_CONVERTER_s::sw_node
volatile struct BOOST_SWITCH_NODE_SETTINGS_s sw_node[BOOST_MPHASE_COUNT]
BOOST converter switch node settings.
Definition: dev_boost_typedef.h:536
BOOST_SWITCH_NODE_SETTINGS_s::dead_time_rising
volatile uint16_t dead_time_rising
Dead time setting at rising edge of a half-bridge drive.
Definition: dev_boost_typedef.h:417
BOOST_ADC_INPUT_SETTINGS_s::enabled
volatile bool enabled
input channel enable bit
Definition: dev_boost_typedef.h:454
BOOST_SWITCH_NODE_SETTINGS_s::gpio_instance
volatile uint16_t gpio_instance
GPIO instance of the selected PWM generator.
Definition: dev_boost_typedef.h:405
P33C_PWM_GENERATOR_s::PGxCONL
union P33C_PWM_GENERATOR_s::@266 PGxCONL
P33C_PGxIOCONL_OVREN_ASYNC_SWAP
#define P33C_PGxIOCONL_OVREN_ASYNC_SWAP
PWMxL output is leading PWM.
Definition: dev_boost_ptemp_pwm.h:455
P33C_PGxSTAT_UPDREQ
#define P33C_PGxSTAT_UPDREQ
Control bit in PGxSTAT setting the Update Request bit.
Definition: dev_boost_ptemp_pwm.h:471
P33C_PWM_GENERATOR_s::PGxIOCONL
union P33C_PWM_GENERATOR_s::@269 PGxIOCONL
P33C_PWM_GENERATOR_s::bits
struct tagPG1CONLBITS bits
Definition: p33c_pwm.h:208
BOOST_CONVERTER_SETTINGS_s::no_of_phases
volatile uint16_t no_of_phases
number of converter phases
Definition: dev_boost_typedef.h:351
P33C_PWM_GENERATOR_s::PGxDTL
union P33C_PWM_GENERATOR_s::@290 PGxDTL
BOOST_GPIO_INSTANCE_s::io_type
volatile uint16_t io_type
Input/Output definition (0=push-pull output, 1=input, 2=open-drain output)
Definition: dev_boost_typedef.h:503
P33C_PGxIOCONH_PEN_ASYNC
#define P33C_PGxIOCONH_PEN_ASYNC
PWMxH output is leading PWM.
Definition: dev_boost_ptemp_pwm.h:465
P33C_PWM_GENERATOR_s::PGxLEBL
union P33C_PWM_GENERATOR_s::@281 PGxLEBL
BOOST_SWITCH_NODE_SETTINGS_s::gpio_low
volatile uint16_t gpio_low
GPIO port pin-number of PWMxL of the selected PWM generator.
Definition: dev_boost_typedef.h:407
BOOST_SWITCH_NODE_SETTINGS_s::period
volatile uint16_t period
Switching period.
Definition: dev_boost_typedef.h:412
BOOST_SWITCH_NODE_SETTINGS_s::sync_drive
volatile bool sync_drive
Selecting if switch node is driven in synchronous or asnchronous mode.
Definition: dev_boost_typedef.h:411
BOOST_SWITCH_NODE_SETTINGS_s::phase
volatile uint16_t phase
Switching signal phase-shift.
Definition: dev_boost_typedef.h:413
P33C_GPIO_INSTANCE_s::CNPDx
union P33C_GPIO_INSTANCE_s::@129 CNPDx
BOOST_SWITCH_NODE_SETTINGS_s::gpio_high
volatile uint16_t gpio_high
GPIO port pin-number of PWMxH of the selected PWM generator.
Definition: dev_boost_typedef.h:406
P33C_GPIO_INSTANCE_s::ODCx
union P33C_GPIO_INSTANCE_s::@127 ODCx
P33C_GPIO_INSTANCE_s::ANSELx
union P33C_GPIO_INSTANCE_s::@123 ANSELx
P33C_PWM_MODULE_s::vMPER
union P33C_PWM_MODULE_s::@217 vMPER
ADC_SHRCORE_MASK_INDEX
#define ADC_SHRCORE_MASK_INDEX
This define masks shared core of ADC.
Definition: dev_boost_ptemp_adc.h:89
BOOST_GPIO_INSTANCE_s::pin
volatile uint16_t pin
GPIO port pin number.
Definition: dev_boost_typedef.h:501
P33C_PGxCONL_HRES_EN
#define P33C_PGxCONL_HRES_EN
control bit in PGxCONL enabling/disabling High Resolution Mode
Definition: dev_boost_ptemp_pwm.h:444
ADC_CORE2_MASK_INDEX
#define ADC_CORE2_MASK_INDEX
This define masks core 2 of ADC.
Definition: dev_boost_ptemp_adc.h:77
BOOST_GPIO_INSTANCE_s::enabled
volatile bool enabled
Specifies, if this IO is used or not.
Definition: dev_boost_typedef.h:499
BOOST_ADC_INPUT_SETTINGS_s::adc_core
volatile uint8_t adc_core
number of the ADC core connected to the selected channel
Definition: dev_boost_typedef.h:458
P33C_PGxIOCONL_OVREN_ASYNC
#define P33C_PGxIOCONL_OVREN_ASYNC
control bits in PGxIOCONL enabling/disabling the PWM output override in asynchronous mode
Definition: dev_boost_ptemp_pwm.h:454
ADC_POWERUP_TIMEOUT
#define ADC_POWERUP_TIMEOUT
Digital-To-Analog Converter and High Speed Comparator Special Function Register Set.
Definition: dev_boost_ptemp_adc.h:51
BOOST_GPIO_SETTINGS_s::PowerGood
volatile struct BOOST_GPIO_INSTANCE_s PowerGood
Power Good Output.
Definition: dev_boost_typedef.h:517
P33C_PWM_GENERATOR_s::PGxDTH
union P33C_PWM_GENERATOR_s::@291 PGxDTH
P33C_PGxCONL_PWM_ON
#define P33C_PGxCONL_PWM_ON
control bit in PGxCONL enabling/disabling the PWM generator
Definition: dev_boost_ptemp_pwm.h:439
BOOST_CONVERTER_STATUS_s::async_mode
volatile bool async_mode
Bit #9: Control bit suspending the synchronous rectifier switch PWM channel.
Definition: dev_boost_typedef.h:219
P33C_PWM_GENERATOR_s::value
uint16_t value
Definition: p33c_pwm.h:209
P33C_GPIO_INSTANCE_s
Definition: p33c_gpio.h:271
P33C_PWM_GENERATOR_s::PGxTRIGC
union P33C_PWM_GENERATOR_s::@289 PGxTRIGC
BOOST_ADC_INPUT_SETTINGS_s::differential_input
volatile bool differential_input
input channel differential mode enable bit
Definition: dev_boost_typedef.h:462
ADC_CORE1_MASK_INDEX
#define ADC_CORE1_MASK_INDEX
This define masks core 1 of ADC.
Definition: dev_boost_ptemp_adc.h:71
BOOST_ADC_INPUT_SETTINGS_s
ADC input channel configuration.
Definition: dev_boost_typedef.h:452
P33C_PWM_MODULE_s
Definition: p33c_pwm.h:84
BOOST_GPIO_INSTANCE_s::polarity
volatile uint16_t polarity
Output polarity, where 0=ACTIVE HIGH, 1=ACTIVE_LOW.
Definition: dev_boost_typedef.h:502
BOOST_ADC_INPUT_SETTINGS_s::early_interrupt_enable
volatile bool early_interrupt_enable
input channel early interrupt enable bit
Definition: dev_boost_typedef.h:461
P33C_PGxIOCONH_PEN_SYNC
#define P33C_PGxIOCONH_PEN_SYNC
control bits in PGxIOCONH enabling/disabling the PWM outputs in synchronous mode
P33C_GPIO_INSTANCE_s::PORTx
union P33C_GPIO_INSTANCE_s::@125 PORTx
P33C_PWM_MODULE_s::value
uint16_t value
Definition: p33c_pwm.h:88
P33C_PWM_GENERATOR_s
Definition: p33c_pwm.h:206
BOOST_ADC_INPUT_SETTINGS_s::interrupt_enable
volatile bool interrupt_enable
input channel interrupt enable bit
Definition: dev_boost_typedef.h:460
ADC_CORE3_MASK_INDEX
#define ADC_CORE3_MASK_INDEX
This define masks core 3 of ADC.
Definition: dev_boost_ptemp_adc.h:83
BOOST_GPIO_INSTANCE_s
GPIO instance of the converter control GPIO.
Definition: dev_boost_typedef.h:497
adcore_mask
volatile uint16_t adcore_mask
This variable is use to set the ADC core mask.
Definition: dev_boost_pconfig.c:25
BOOST_CONVERTER_s::status
volatile struct BOOST_CONVERTER_STATUS_s status
BOOST operation status bits.
Definition: dev_boost_typedef.h:529
P33C_PWM_GENERATOR_s::PGxSTAT
union P33C_PWM_GENERATOR_s::@268 PGxSTAT
BOOST_ADC_INPUT_SETTINGS_s::signed_result
volatile bool signed_result
input channel singed result mode enable bit
Definition: dev_boost_typedef.h:463
BOOST_GPIO_INSTANCE_s::port
volatile uint16_t port
GPIO port instance number (0=Port RA, 0=Port RB, 0=Port RC, etc.)
Definition: dev_boost_typedef.h:500
BOOST_SWITCH_NODE_SETTINGS_s::duty_ratio_min
volatile uint16_t duty_ratio_min
Absolute duty cycle minimum during normal operation.
Definition: dev_boost_typedef.h:415
BOOST_CONVERTER_s::gpio
volatile struct BOOST_GPIO_SETTINGS_s gpio
BOOST converter additional GPIO specification.
Definition: dev_boost_typedef.h:537
P33C_PWM_GENERATOR_s::PGxCONH
union P33C_PWM_GENERATOR_s::@267 PGxCONH
BOOST_SWITCH_NODE_SETTINGS_s::master_period_enable
volatile bool master_period_enable
Selecting MASTER or Individual period register.
Definition: dev_boost_typedef.h:409
BOOST_GPIO_SETTINGS_s::EnableInput
volatile struct BOOST_GPIO_INSTANCE_s EnableInput
External ENABLE input.
Definition: dev_boost_typedef.h:516
P33C_PGxIOCONL_OVREN_SYNC
#define P33C_PGxIOCONL_OVREN_SYNC
control bits in PGxIOCONL enabling/disabling the PWM output override in synchronous mode
Definition: dev_boost_ptemp_pwm.h:449
BOOST_CONVERTER_s
BOOST control & monitoring data structure.
Definition: dev_boost_typedef.h:527
P33C_PWM_GENERATOR_s::PGxDC
union P33C_PWM_GENERATOR_s::@284 PGxDC
ADC_CORE0_MASK_INDEX
#define ADC_CORE0_MASK_INDEX
This define masks core 0 of ADC.
Definition: dev_boost_ptemp_adc.h:65
P33C_PGxIOCONH_PEN_ASYNC_SWAP
#define P33C_PGxIOCONH_PEN_ASYNC_SWAP
PWMxL output is leading PWM.
Definition: dev_boost_ptemp_pwm.h:466
BOOST_ADC_INPUT_SETTINGS_s::level_trigger
volatile bool level_trigger
input channel level trigger mode enable bit
Definition: dev_boost_typedef.h:464
BOOST_CONVERTER_s::set_values
volatile struct BOOST_CONVERTER_SETTINGS_s set_values
Control field for global access to references.
Definition: dev_boost_typedef.h:532