| Digital Power Starter Kit 3 Firmware dsPIC33C Boost Converter Voltage Mode Control Example |

p33c_dsp.h
1 /*LICENSE *****************************************************************************************
2 *
3 * Software License Agreement
4 *
5 * Copyright (R) 2012 Microchip Technology Inc. All rights reserved. Microchip licenses to you the
6 * right to use, modify, copy and distribute Software only when embedded on a Microchip
7 * microcontroller or digital signal controller, which is integrated into your product or third
8 * party product (pursuant to the sublicense terms in the accompanying license agreement).
9 *
10 * You should refer to the license agreement accompanying this Software for additional information
11 * regarding your rights and obligations.
12 *
13 * SOFTWARE AND DOCUMENTATION ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR
14 * IMPLIED, INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY, TITLE, NON-INFRINGEMENT
15 * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL MICROCHIP OR ITS LICENSORS BE LIABLE OR
16 * OBLIGATED UNDER CONTRACT, NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR
17 * OTHER LEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSES INCLUDING BUT NOT
18 * LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE OR CONSEQUENTIAL DAMAGES, LOST PROFITS
19 * OR LOST DATA, COST OF PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY
20 * THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS.
21 *
22 * ***********************************************************************************************/
23
24 #ifndef P33C_DSP_SFR_ABSTRACTION_H
25 #define P33C_DSP_SFR_ABSTRACTION_H
26
27 /**************************************************************************************************
28 * @file p33c_dac.h
29 * @see p33c_dsp.c
30 * @brief Generic Digital Signal Processor Driver Module (header file)
31 * @details
32 * This additional header file contains defines for all required bit-settings of all related
33 * special function registers of a peripheral module and/or instance.
34 * This file is an additional header file on top of the generic device header file.
35 *
36 *************************************************************************************************/
37
38 // CORCON: CORE CONTROL REGISTER
39
40 #define REG_CORCON_UNUSED_MSK 0b0100000000000000
41 #define REG_CORCON_VALID_DATA_WRITE_MSK 0b1011100011110011
42 #define REG_CORCON_VALID_DATA_READ_MSK 0b1011111111111111
43
44 #define REG_CORCON_VAR_VARIABLE 0b1000000000000000
45 #define REG_CORCON_VAR_FIXED 0b0000000000000000
46
47 enum CORCON_VAR_e{
48 CORCON_VAR_VARIABLE = 0b1, // Variable exception processing is enabled
49 CORCON_VAR_FIXED = 0b0 // Fixed exception processing is enabled
50 };
51 typedef enum CORCON_VAR_e CORCON_VAR_t; // Variable Exception Processing Latency Control bit
52
53 #define REG_CORCON_US_MIXED 0b0010000000000000 // DSP engine multiplies are mixed sign
54 #define REG_CORCON_US_UNSIGNED 0b0001000000000000 // DSP engine multiplies are unsigned
55 #define REG_CORCON_US_SIGNED 0b0000000000000000 // DSP engine multiplies are signed
56
57 enum CORCON_US_e{
58 CORCON_US_MIXED = 0b10, // DSP engine multiplies are mixed sign
59 CORCON_US_UNSIGNED = 0b01, // DSP engine multiplies are unsigned
60 CORCON_US_SIGNED = 0b00 // DSP engine multiplies are signed
61 };
62 typedef enum CORCON_US_e CORCON_US_t; // DSP Multiply Unsigned/Signed Control bits
63
64 #define REG_CORCON_EDT_TERMINATE 0b0000100000000000
65 #define REG_CORCON_EDT_RUN 0b0000000000000000
66
67 enum CORCON_EDT_e{
68 CORCON_EDT_TERMINATE = 0b1, // Terminates executing DO loop at the end of the current loop iteration
69 CORCON_EDT_RUN = 0b0 // No effect
70 };
71 typedef enum CORCON_EDT_e CORCON_EDT_t; // Early DO Loop Termination Control bit
72
73 #define REG_CORCON_DL_7 0b0000011100000000 // Seven DO loops are active
74 #define REG_CORCON_DL_6 0b0000011100000000 // Six DO loops are active
75 #define REG_CORCON_DL_5 0b0000011100000000 // Five DO loops are active
76 #define REG_CORCON_DL_4 0b0000011100000000 // Four DO loops are active
77 #define REG_CORCON_DL_3 0b0000011100000000 // Three DO loops are active
78 #define REG_CORCON_DL_2 0b0000011100000000 // Two DO loops are active
79 #define REG_CORCON_DL_1 0b0000011100000000 // One DO loops are active
80 #define REG_CORCON_DL_0 0b0000011100000000 // Zero DO loops are active
81
82 enum CORCON_DL_STAT_e{
83 CORCON_DL_7 = 0b111, // Seven DO loops are active
84 CORCON_DL_6 = 0b110, // Six DO loops are active
85 CORCON_DL_5 = 0b101, // Five DO loops are active
86 CORCON_DL_4 = 0b100, // Four DO loops are active
87 CORCON_DL_3 = 0b011, // Three DO loops are active
88 CORCON_DL_2 = 0b010, // Two DO loops are active
89 CORCON_DL_1 = 0b001, // One DO loops are active
90 CORCON_DL_0 = 0b000 // Zero DO loops are active
91 };
92 typedef enum CORCON_DL_STAT_e CORCON_DL_STAT_t; // DO Loop Nesting Level Status bits
93
94 #define REG_CORCON_SATA_ON 0b0000000010000000 // Accumulator A saturation is enabled
95 #define REG_CORCON_SATA_OFF 0b0000000000000000 // Accumulator A saturation is disabled
96
97 enum CORCON_SATA_e{
98 CORCON_SATA_ON = 0b1, // Accumulator A saturation is enabled
99 CORCON_SATA_OFF = 0b0 // Accumulator A saturation is disabled
100 };
101 typedef enum CORCON_SATA_e CORCON_SATA_t; // ACCA Saturation Enable bit
102
103 #define REG_CORCON_SATB_ON 0b0000000001000000 // Accumulator B saturation is enabled
104 #define REG_CORCON_SATB_OFF 0b0000000000000000 // Accumulator B saturation is disabled
105
106 enum CORCON_SATB_e{
107 CORCON_SATB_ON = 0b1, // Accumulator B saturation is enabled
108 CORCON_SATB_OFF = 0b0 // Accumulator B saturation is disabled
109 };
110 typedef enum CORCON_SATB_e CORCON_SATB_t; // ACCB Saturation Enable bit
111
112 #define REG_CORCON_SATDW_ON 0b0000000000100000 // Data Space write saturation is enabled
113 #define REG_CORCON_SATDW_OFF 0b0000000000000000 // Data Space write saturation is disabled
114
115 enum CORCON_SATDW_e{
116 CORCON_SATDW_ON = 0b1, // Data Space write saturation is enabled
117 CORCON_SATDW_OFF = 0b0 // Data Space write saturation is disabled
118 };
119 typedef enum CORCON_SATDW_e CORCON_SATDW_t; // Data Space Write from DSP Engine Saturation Enable bit
120
121 #define REG_CORCON_ACCSAT_931 0b0000000000010000 // 9.31 saturation (super saturation)
122 #define REG_CORCON_ACCSAT_131 0b0000000000000000 // 1.31 saturation (normal saturation)
123
124 enum CORCON_ACCSAT_e{
125 CORCON_ACCSAT_931 = 0b1, // 9.31 saturation (super saturation)
126 CORCON_ACCSAT_131 = 0b0 // 1.31 saturation (normal saturation)
127 };
128 typedef enum CORCON_ACCSAT_e CORCON_ACCSAT_t; // Accumulator Saturation Mode Select bit
129
130 #define REG_CORCON_IPL3_STAT_GT7 0b0000000000001000
131 #define REG_CORCON_IPL3_STAT_LT7 0b0000000000000000
132
133 enum CORCON_IPL3_STAT_e{
134 CORCON_IPL3_STAT_GT7 = 0b1, // CPU Interrupt Priority Level is greater than 7
135 CORCON_IPL3_STAT_LT7 = 0b0 // CPU Interrupt Priority Level is 7 or less
136 };
137 typedef enum CORCON_IPL3_STAT_e CORCON_IPL3_STAT_t; // CPU Interrupt Priority Level Status bit 3
138
139 #define REG_CORCON_SFA_ACTIVE 0b0000000000000100 // Stack frame is active; W14 and W15 address 0x0000 to 0xFFFF, regardless of DSRPAG
140 #define REG_CORCON_SFA_INACTIVE 0b0000000000000000 // Stack frame is not active; W14 and W15 address the base Data Space
141
142 enum CORCON_SFA_e{
143 CORCON_SFA_ACTIVE = 0b1, // Stack frame is active; W14 and W15 address 0x0000 to 0xFFFF, regardless of DSRPAG
144 CORCON_SFA_INACTIVE = 0b0 // Stack frame is not active; W14 and W15 address the base Data Space
145 };
146 typedef enum CORCON_SFA_e CORCON_SFA_t; // Stack Frame Active Status bit
147
148 #define REG_CORCON_RND_BIASED 0b0000000000000010 // Biased (conventional) rounding is enabled
149 #define REG_CORCON_RND_UNBIASED 0b0000000000000000 // Unbiased (convergent) rounding is enabled
150
151 enum CORCON_RND_e{
152 CORCON_RND_BIASED = 0b1, // Biased (conventional) rounding is enabled
153 CORCON_RND_UNBIASED = 0b0 // Unbiased (convergent) rounding is enabled
154 };
155 typedef enum CORCON_RND_e CORCON_RND_t; // Rounding Mode Select bit
156
157 #define REG_CORCON_IF_INTEGER 0b0000000000000001 // Integer mode is enabled for DSP multiply
158 #define REG_CORCON_IF_FRACTIONAL 0b0000000000000000 // Fractional mode is enabled for DSP multiply
159
160 enum CORCON_IF_e{
161 CORCON_IF_INTEGER = 0b1, // Integer mode is enabled for DSP multiply
162 CORCON_IF_FRACTIONAL = 0b0 // Fractional mode is enabled for DSP multiply
163 };
164 typedef enum CORCON_IF_e CORCON_IF_t; // Integer or Fractional Multiplier Mode Select bit
165
166 struct P33C_DSP_CONFIG_s
167 {
168 union {
169 struct tagCORCONBITS bits; // Register bit-field
170 uint16_t value; // 16-bit wide register value
171 } CORCON; // CORCON: CORE CONTROL REGISTER VALUE
172
173 };
174 typedef struct P33C_DSP_CONFIG_s P33C_DSP_CONFIG_t; // CORCON: CORE CONTROL REGISTER
175
176 /*********************************************************************************
177 * @fn volatile struct P33C_DSP_CONFIG_s* p33c_Dsp_GetHandle(void)
178 * @ingroup lib-layer-pral-functions-public-dsp
179 * @brief Gets pointer to DSP Module SFR set
180 * @param void
181 * @return struct P33C_DSP_CONFIG_s Pointer to DSP module special function register set object
182 *
183 * @details
184 * This function returns the pointer to the DSP configuration register
185 * in Special Function Register memory space. This pointer can be used to
186 * directly write to/read from the Special Function Registers of the DSP
187 * peripheral module configuration.
188 *********************************************************************************/
189 #define p33c_DspConfig_GetHandle() (struct P33C_DSP_CONFIG_s*)&CORCON
190
191
192 /* PROTOTYPES */
193 extern volatile uint16_t p33c_Dsp_WriteConfig(volatile struct P33C_DSP_CONFIG_s dsp_cfg);
194 extern volatile struct P33C_DSP_CONFIG_s p33c_Dsp_ReadConfig(void);
195
196 #endif /* end of P33C_DSP_SFR_ABSTRACTION_H */
197
198 // end of file
P33C_DSP_CONFIG_s::bits
struct tagCORCONBITS bits
Definition: p33c_dsp.h:169
P33C_DSP_CONFIG_s::value
uint16_t value
Definition: p33c_dsp.h:170
P33C_DSP_CONFIG_s::CORCON
union P33C_DSP_CONFIG_s::@122 CORCON
P33C_DSP_CONFIG_s
Definition: p33c_dsp.h:166