# Diode Clipping, Clamping, Doubler
Note: This is coppied as is from my lab report as a junior student for ECE.


# Abstract
In this lab, three diode circuits were tested in order to understand how a diode can determine the behavior of a circuit. The first circuit is the diode clipping circuit, which should have an output that is restricted by a diode. The second circuit is the clamping circuit, which is a circuit that has a diode and a capacitor that is used to change the waveform to a specific DC level. The last circuit that will be tested is the voltage doubler, which is a circuit consisting of diodes and capacitors that gives an output that is double the input.
 
# Introduction
The three circuits that will be tested in this experiment are widely used in industry. They are used in order to specify the desired output or DC levels. The purpose of this lab is to learn how to get advantage of diode properties in order to build useful circuits. With these circuits, the cutoff voltages for the diodes were tested to demonstrate how diodes react based upon the way they are implemented into the circuit. The first circuit demonstrated how the direction of the cathode affected when the diode would receive a forward or reverse bias. In this circuit, if the source voltage was negative, the diode that had its cathode in the path of the current would receive a reverse bias, which resulted in any components to be activated behind the diode. When the source voltage was positive, the diode with the cathode pointed with the same flow as the current would receive a forward bias, creating a short, and thus activating any components in its path. The second circuit built was a diode clamp circuit. In this case the circuit was a negative diode clipping circuit. As the name implies, the circuit clips off the negative voltages. The resulting voltage will be the absolute value of the negative voltage plus the positive voltage. The final circuit was a voltage doubler, which as the name implies doubles the voltage. Ideally, the circuit produces exactly double the voltage by charging up capacitors at the time in which the source activates. The diodes in this circuit charge the capacitors by letting the capacitor charge when the source voltage is positive.

# Theory 
The pn-junction diodes conduct electricity in forward biased mode and acts almost as an open circuit in the reverse biased mode. The pm-junction also has a voltage drop of ~0.7V when it is forward biased. Due to these properties, the clipping circuits produces an output waveform which is a clipped version of the input. Clipping circuits can be positive clipping, negative clipping, clipping of two different bias levels and others. The circuit that was built is a clipping circuit of two bias levels. In this circuit the diodes are parallel as shown in circuit 1. When the applied voltage is in the positive half cycle, the diode D1 will be forward biased and the diode D2 will be reverse biased. This means that only D1 will conduct, or in other words, D1 will clip during the positive half cycle. During the negative half cycle, the opposite will occur. D2 will clip the negative voltage while D1 will act as an open circuit. Because of this, both half cycles will be clipped. Note that the output voltages will not be ~-0.7V and 0.7V since in this circuit there are added DC voltages. The clamp circuit shown in circuit 2 also take advantage of diode properties along with the capacitor. The work of this circuit is to produce an output that is clamped version of the input. This means that instead of having the waveform with a DC of zero, the DC offset will go either up or down. In this circuit, since it is consisting of a reverse biased diode, the waveform should clamp the input positively. The reason is that during the negative cycle, the diode will conduct electricity and it will charge the capacitor until it is 10V – 0.7V, that is the voltage from the source and the voltage drop from the diode. During the positive cycle however, the diode is reverse biased, and it will act as an open circuit that will not affect the voltage. During this cycle the voltage across the capacitor will be added to the voltage of the source, which means instead of starting from -10V to +10V, it will have a wave form of 0V to 20V, or more accurately, from -0.7V to 20V-0.7V. Lastly, the voltage double circuit is a circuit that should have an output that is double the input AC peak voltage. As shown in circuit 3, the circuit consist of two diodes and two capacitors, that is a clamper and a peak detector. During the negative half cycle, the capacitor C1 will be charged until 10V – 0.7 V while the right side of the circuit will be off. During the positive half cycle, the diode D2 is not conducting, and the voltage that is going to the diode D1 should be the source 10V added to the C1 voltage which is 9.3, which comes to total of 19.3V. this means that the diode D1 sees a clamped voltage. The capacitor C2 will be charging to the peak of the sin voltage with the new offset. Because of that, the output should be double the input positive peak voltage.

# the circuits in order

<img width="202" alt="image" src="https://user-images.githubusercontent.com/66625688/84993476-506e6e00-b117-11ea-9d99-610b593ef74b.png">

# Methods
The first circuit was built by providing an AC voltage as a source  and two biased DC voltages in series with parallel and opposite biased diodes. After connecting the circuit and measuring the input and output, the waveform in figure 1 was taken. Then the scope was switched to xy mode as shown in figure 2.

<img width="407" alt="image" src="https://user-images.githubusercontent.com/66625688/84993078-c6bea080-b116-11ea-90c3-264fb516405d.png">


Next, circuit 2 was built by placing an AC power supply, diode and capacitor in series and Figure 3 was taking to show the input and the output. Chanel 1 represented the input waveform and channel 2 represents the output waveform. The results were as expected, and they will be discussed in the discussion section of this report.

<img width="362" alt="image" src="https://user-images.githubusercontent.com/66625688/84993131-da6a0700-b116-11ea-8de6-07f123fb30c8.png">


Finally, circuit 3 was built by placing one pin of the capacitor, diode, and the negative part of voltage source in a common ground. The input and output voltages were measured, and the waveform is shown in figure 4. Figure 5 shows the wrong result that was taken earlier, and it will be discussed in the discussion part of the report.

<img width="341" alt="image" src="https://user-images.githubusercontent.com/66625688/84993202-f2418b00-b116-11ea-9f47-29d5e11df564.png">

# Results

<img width="425" alt="image" src="https://user-images.githubusercontent.com/66625688/84993266-0e452c80-b117-11ea-8ef1-842e3bd527dc.png">


# Discussion
In the first part of the experiment, it was predicted that the output will be flattened version of the input, and due to the two biased voltages sources, there will be some added value to the voltage. Table 1 and figure 1 show the results as expected. Since diode have a cutoff voltage of 0.7, during the positive half cycle the output voltage will be 0.7V from the diode and 4V from the DC source. During that cycle, the diode D2 will be reverse biased and it will prevent the voltage from entering its terminal, which means only the left side is on. This explains why figure 1 shows that the positive output value is 4.7V. Similarly, during the negative half cycle the diode D2 will be forward biased and it will allow a voltage of 0.7V, and the output will be this voltage added to the DC voltage of 7V. This is the reason why the negative voltage in figure 1 is -7.7V. In the second circuit, the output voltage was predicted to have the same peak to peak value, but with a new positive offset. That is instead of being from -10V to 10V, it will be approximately from 0V to 20V. Figure 2 shows that the results were as predicted, taking in account the voltage drops of 0.7V. During the negative half cycle, the capacitor was charging until it reached 10-0.7 or 9.3V. Then during the positive half cycle, the output is the 10Vpk + 9.3V which should be 19.3V which is very close to what was found in figure 2. Lastly, the voltage doubler circuit was predicted to have an output that is double the peak input. The left side acts as a diode clamp and the right-hand side will get the clamped voltage and produce the doubled voltage. In the beginning, the output voltage was not as predicted, as shown in figure 5. It was flattening fast and decaying. The diodes were changed but the results the same. Then the reason was found to be the capacitor, as it was 1 nano-farad instead of 1 microfarad. However, despite this changing the resulting output voltage, the leaking still occurred. Due to changing the diodes and finding nothing wrong, the results could not be because of a strong reverse bias in one of the diodes. Thus, after switched the capacitors to a more insulated capacitor, it was found that the capacitor was now holding its voltage. Figure 4 was then taken to be the result and it was working as expected. The waveform in figure 4 shows that during the negative cycle the diode D2 is conducting and capacitor C1 is charging while the right-hand side is off. It also shows that during the positive cycle  the output is doubling as it start to see the clamped voltage. 


