/// ASCII Adjust After Addition.
AAA
/// ASCII Adjust AX Before Division.
AAD
/// ASCII Adjust AX After Multiply.
AAM
/// ASCII Adjust AL After Subtraction.
AAS
/// Add with Carry.
ADC
/// Unsigned integer add with carry.
ADCX
/// Add.
ADD
/// Add Packed Double-Precision Floating-Point Values.
ADDPD
/// Add Packed Single-Precision Floating-Point Values.
ADDPS
/// Add Scalar Double-Precision Floating-Point Values.
ADDSD
/// Add Scalar Single-Precision Floating-Point Values.
ADDSS
/// Packed Double-FP Add/Subtract.
ADDSUBPD
/// Packed Single-FP Add/Subtract.
ADDSUBPS
/// Unsigned integer add with overflow.
ADOX
/// Perform an AES decryption round using an 128-bit state and a round key.
AESDEC
/// Perform Last Round of an AES Decryption Flow.
AESDECLAST
/// Perform an AES encryption round using an 128-bit state and a round key.
AESENC
/// Perform Last Round of an AES Encryption Flow.
AESENCLAST
/// Perform an inverse mix column transformation primitive.
AESIMC
/// Assist the creation of round keys with a key expansion schedule.
AESKEYGENASSIST
/// Logical AND.
AND
/// Bitwise AND of first source with inverted 2nd source operands.
ANDN
/// Bitwise Logical AND of Packed Double-Precision Floating-Point Values.
ANDNPD
/// Bitwise Logical AND of Packed Single-Precision Floating-Point Values.
ANDNPS
/// Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values.
ANDPD
/// Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values.
ANDPS
/// Adjust RPL Field of Segment Selector.
ARPL
/// Contiguous bitwise extract.
BEXTR
/// Blend Packed Double Precision Floating-Point Values.
BLENDPD
/// Blend Packed Single Precision Floating-Point Values.
BLENDPS
/// Variable Blend Packed Double Precision Floating-Point Values.
BLENDVPD
/// Variable Blend Packed Single Precision Floating-Point Values.
BLENDVPS
/// Extract lowest set bit.
BLSI
/// Set all lower bits below first set bit to 1.
BLSMSK
/// Reset lowest set bit.
BLSR
/// Check the address of a memory reference against a LowerBound.
BNDCL
/// Check Upper Bound.
BNDCN
/// Check Upper Bound.
BNDCU
/// Load Extended Bounds Using Address Translation.
BNDLDX
/// Create a LowerBound and a UpperBound in a register.
BNDMK
/// Move Bounds.
BNDMOV
/// Store bounds using address translation.
BNDSTX
/// Check Array Index Against Bounds.
BOUND
/// Bit Scan Forward.
BSF
/// Bit Scan Reverse.
BSR
/// Byte Swap.
BSWAP
/// Bit Test.
BT
/// Bit Test and Complement.
BTC
/// Bit Test and Reset.
BTR
/// Bit Test and Set.
BTS
/// Zero high bits starting from specified bit position.
BZHI
/// Far call.
CALLFar
/// Near call.
CALLNear
/// Convert Byte to Word.
CBW
/// Convert Doubleword to Quadword.
CDQ
/// Convert Doubleword to Quadword.
CDQE
/// Clear AC Flag in EFLAGS Register.
CLAC
/// Clear Carry Flag.
CLC
/// Clear Direction Flag.
CLD
/// Flush Cache Line.
CLFLUSH
/// Flush Cache Line Optimized.
CLFLUSHOPT
/// Clear Interrupt Flag.
CLI
/// Clear busy bit in a supervisor shadow stack token.
CLRSSBSY
/// Clear Task-Switched Flag in CR0.
CLTS
/// Cache Line Write Back.
CLWB
/// Complement Carry Flag.
CMC
/// Conditional Move (Move if above (CF = 0 and ZF = 0)).
CMOVA
/// Conditional Move (Move if above or equal (CF = 0)).
CMOVAE
/// Conditional Move (Move if below (CF = 1)).
CMOVB
/// Conditional Move (Move if below or equal (CF = 1 or ZF = 1)).
CMOVBE
/// Conditional move if carry.
CMOVC
/// Conditional Move (Move if greater (ZF = 0 and SF = OF)).
CMOVG
/// Conditional Move (Move if greater or equal (SF = OF)).
CMOVGE
/// Conditional Move (Move if less (SF <> OF)).
CMOVL
/// Conditional Move (Move if less or equal (ZF = 1 or SF <> OF)).
CMOVLE
/// Conditional move if not carry.
CMOVNC
/// Conditional Move (Move if not overflow (OF = 0)).
CMOVNO
/// Conditional Move (Move if not parity (PF = 0)).
CMOVNP
/// Conditional Move (Move if not sign (SF = 0)).
CMOVNS
/// Conditional Move (Move if not zero (ZF = 0)).
CMOVNZ
/// Conditional Move (Move if overflow (OF = 1)).
CMOVO
/// Conditional Move (Move if parity (PF = 1)).
CMOVP
/// Conditional Move (Move if sign (SF = 1)).
CMOVS
/// Conditional Move (Move if zero (ZF = 1)).
CMOVZ
/// Compare Two Operands.
CMP
/// Compare packed double-precision floating-point values.
CMPPD
/// Compare packed single-precision floating-point values.
CMPPS
/// Compare String Operands (byte).
CMPSB
/// Compare String Operands (dword) or Compare scalar dbl-precision FP values.
CMPSD
/// Compare String Operands (quadword).
CMPSQ
/// Compare scalar single-precision floating-point values.
CMPSS
/// Compare String Operands (word).
CMPSW
/// Compare and Exchange.
CMPXCHG
/// Compare and Exchange Bytes.
CMPXCHG16B
/// Compare and Exchange Bytes.
CMPXCHG8B
/// Compare Scalar Ordered Double-Precision FP Values and Set EFLAGS.
COMISD
/// Compare Scalar Ordered Single-Precision FP Values and Set EFLAGS.
COMISS
/// CPU Identification.
CPUID
/// Convert Quadword to Octaword.
CQO
/// Accumulate CRC32 Value.
CRC32
/// Convert Packed Dword Integers to Packed Double-Precision FP Values.
CVTDQ2PD
/// Convert Packed Dword Integers to Packed Single-Precision FP Values.
CVTDQ2PS
/// Convert Packed Double-Precision FP Values to Packed Dword Integers.
CVTPD2DQ
/// Convert Packed Double-Precision FP Values to Packed Dword Integers.
CVTPD2PI
/// Convert Packed Double-Precision FP Values to Packed Single-Precision FP.
CVTPD2PS
/// Convert Packed Dword Integers to Packed Double-Precision FP Values.
CVTPI2PD
/// Convert Packed Dword Integers to Packed Single-Precision FP Values.
CVTPI2PS
/// Convert Packed Single-Precision FP Values to Packed Dword Integers.
CVTPS2DQ
/// Convert Packed Single-Precision FP Values to Packed Double-Precision FP.
CVTPS2PD
/// Convert Packed Single-Precision FP Values to Packed Dword Integers.
CVTPS2PI
/// Convert Scalar Double-Precision FP Value to Integer.
CVTSD2SI
/// Convert Scalar Double-Precision FP Value to Scalar Single-Precision FP.
CVTSD2SS
/// Convert Dword Integer to Scalar Double-Precision FP Value.
CVTSI2SD
/// Convert Dword Integer to Scalar Single-Precision FP Value.
CVTSI2SS
/// Convert Scalar Single-Precision FP Value to Scalar Double-Precision FP.
CVTSS2SD
/// Convert Scalar Single-Precision FP Value to Dword Integer.
CVTSS2SI
/// Convert with Truncation Packed Double-Precision FP Values to Packed Dword.
CVTTPD2DQ
/// Convert with Truncation Packed Double-Precision FP Values to Packed Dword.
CVTTPD2PI
/// Convert with Truncation Packed Single-Precision FP Values to Packed Dword.
CVTTPS2DQ
/// Convert with Truncation Packed Single-Precision FP Values to Packed Dword.
CVTTPS2PI
/// Convert with Truncation Scalar Double-Precision FP Value to Signed.
CVTTSD2SI
/// Convert with Truncation Scalar Single-Precision FP Value to Dword Integer.
CVTTSS2SI
/// Convert Word to Doubleword.
CWD
/// Convert Word to Doubleword.
CWDE
/// Decimal Adjust AL after Addition.
DAA
/// Decimal Adjust AL after Subtraction.
DAS
/// Decrement by 1.
DEC
/// Unsigned Divide.
DIV
/// Divide Packed Double-Precision Floating-Point Values.
DIVPD
/// Divide Packed Single-Precision Floating-Point Values.
DIVPS
/// Divide Scalar Double-Precision Floating-Point Values.
DIVSD
/// Divide Scalar Single-Precision Floating-Point Values.
DIVSS
/// Perform double-precision dot product for up to 2 elements and broadcast.
DPPD
/// Perform single-precision dot products for up to 4 elements and broadcast.
DPPS
/// Empty MMX Technology State.
EMMS
/// Execute an Enclave System Function of Specified Leaf Number.
ENCLS
/// Execute an Enclave User Function of Specified Leaf Number.
ENCLU
/// Terminate an Indirect Branch in 32-bit and Compatibility Mode.
ENDBR32
/// Terminate an Indirect Branch in 64-bit Mode.
ENDBR64
/// Make Stack Frame for Procedure Parameters.
ENTER
/// Extract Packed Floating-Point Values.
EXTRACTPS
/// Extract Field from Register.
EXTRQ
/// Compute 2x-1.
F2XM1
/// Absolute Value.
FABS
/// Add.
FADD
/// Add and pop the register stack.
FADDP
/// Load Binary Coded Decimal.
FBLD
/// Store BCD Integer and Pop.
FBSTP
/// Change Sign.
FCHS
/// Clear Exceptions.
FCLEX
/// Floating-Point Conditional Move (if below (CF = 1)).
FCMOVB
/// Floating-Point Conditional Move (if below or equal (CF = 1 or ZF = 1)).
FCMOVBE
/// Floating-Point Conditional Move (if equal (ZF = 1)).
FCMOVE
/// Floating-Point Conditional Move (if not below (CF = 0)).
FCMOVNB
/// FP Conditional Move (if not below or equal (CF = 0 and ZF = 0)).
FCMOVNBE
/// Floating-Point Conditional Move (if not equal (ZF = 0)).
FCMOVNE
/// Floating-Point Conditional Move (if not unordered (PF = 0)).
FCMOVNU
/// Floating-Point Conditional Move (if unordered (PF = 1)).
FCMOVU
/// Compare Floating Point Values.
FCOM
/// Compare Floating Point Values and Set EFLAGS.
FCOMI
/// Compare Floating Point Values and Set EFLAGS.
FCOMIP
/// Compare Floating Point Values and pop register stack.
FCOMP
/// Compare Floating Point Values and pop register stack twice.
FCOMPP
/// Cosine.
FCOS
/// Decrement Stack-Top Pointer.
FDECSTP
/// Divide.
FDIV
/// Divide and pop the register stack.
FDIVP
/// Reverse Divide.
FDIVR
/// Reverse Divide and pop the register stack.
FDIVRP
/// Free Floating-Point Register.
FFREE
/// Performs FFREE ST(i) and pop stack.
FFREEP
/// Add.
FIADD
/// Compare Integer.
FICOM
/// Compare Integer and pop the register stack.
FICOMP
/// Divide.
FIDIV
/// Reverse Divide.
FIDIVR
/// Load Integer.
FILD
/// Multiply.
FIMUL
/// Increment Stack-Top Pointer.
FINCSTP
/// Initialize Floating-Point Unit.
FINIT
/// Store Integer.
FIST
/// Store Integer and pop the register stack.
FISTP
/// Store Integer with Truncation.
FISTTP
/// Subtract.
FISUB
/// Reverse Subtract.
FISUBR
/// Load Floating Point Value.
FLD
/// Load Constant (Push +1.0 onto the FPU register stack).
FLD1
/// Load x87 FPU Control Word.
FLDCW
/// Load x87 FPU Environment.
FLDENV
/// Load Constant (Push log2e onto the FPU register stack).
FLDL2E
/// Load Constant (Push log210 onto the FPU register stack).
FLDL2T
/// Load Constant (Push log102 onto the FPU register stack).
FLDLG2
/// Load Constant (Push loge2 onto the FPU register stack).
FLDLN2
/// Load Constant (Push Pi onto the FPU register stack).
FLDPI
/// Load Constant (Push +0.0 onto the FPU register stack).
FLDZ
/// Multiply.
FMUL
/// Multiply and pop the register stack.
FMULP
/// Clear FP exception flags without checking for error conditions.
FNCLEX
/// Initialize FPU without checking error conditions.
FNINIT
/// No Operation.
FNOP
/// Save FPU state without checking error conditions.
FNSAVE
/// Store x87 FPU Control Word.
FNSTCW
/// Store FPU environment without checking error conditions.
FNSTENV
/// Store FPU status word without checking error conditions.
FNSTSW
/// Partial Arctangent.
FPATAN
/// Partial Remainder.
FPREM
/// Partial Remainder.
FPREM1
/// Partial Tangent.
FPTAN
/// Round to Integer.
FRNDINT
/// Restore x87 FPU State.
FRSTOR
/// Store x87 FPU State.
FSAVE
/// Scale.
FSCALE
/// Sine.
FSIN
/// Sine and Cosine.
FSINCOS
/// Square Root.
FSQRT
/// Store Floating Point Value.
FST
/// Store FPU control word after checking error conditions.
FSTCW
/// Store x87 FPU Environment.
FSTENV
/// Store Floating Point Value.
FSTP
/// Store x87 FPU Status Word.
FSTSW
/// Subtract.
FSUB
/// Subtract and pop register stack.
FSUBP
/// Reverse Subtract.
FSUBR
/// Reverse Subtract and pop register stack.
FSUBRP
/// TEST.
FTST
/// Unordered Compare Floating Point Values.
FUCOM
/// Compare Floating Point Values and Set EFLAGS.
FUCOMI
/// Compare Floating Point Values and Set EFLAGS and pop register stack.
FUCOMIP
/// Unordered Compare Floating Point Values.
FUCOMP
/// Unordered Compare Floating Point Values.
FUCOMPP
/// Wait for FPU.
FWAIT
/// Examine ModR/M.
FXAM
/// Exchange Register Contents.
FXCH
/// Restore x87 FPU, MMX, XMM, and MXCSR State.
FXRSTOR
/// Restore x87 FPU, MMX, XMM, and MXCSR State.
FXRSTOR64
/// Save x87 FPU, MMX Technology, and SSE State.
FXSAVE
/// Save x87 FPU, MMX Technology, and SSE State.
FXSAVE64
/// Extract Exponent and Significand.
FXTRACT
/// compute y * log2x.
FYL2X
/// compute y * log2(x+1).
FYL2XP1
/// GETSEC.
GETSEC
/// Galois Field Affine Transformation Inverse.
GF2P8AFFINEINVQB
/// Galois Field Affine Transformation.
GF2P8AFFINEQB
/// Galois Field Multiply Bytes.
GF2P8MULB
/// Packed Double-FP Horizontal Add.
HADDPD
/// Packed Single-FP Horizontal Add.
HADDPS
/// Halt.
HLT
/// Packed Double-FP Horizontal Subtract.
HSUBPD
/// Packed Single-FP Horizontal Subtract.
HSUBPS
/// Signed Divide.
IDIV
/// Signed Multiply.
IMUL
/// Input from Port.
IN
/// Increment by 1.
INC
/// Increment the shadow stack pointer (SSP).
INCSSPD
/// Increment the shadow stack pointer (SSP).
INCSSPQ
/// Input from Port to String.
INS
/// Input from Port to String (byte).
INSB
/// Input from Port to String (doubleword).
INSD
/// Insert Scalar Single-Precision Floating-Point Value.
INSERTPS
/// Inserts Field from a source Register to a destination Register.
INSERTQ
/// Input from Port to String (word).
INSW
/// Call to Interrupt (Interrupt vector specified by immediate byte).
INT
/// Call to Interrupt Procedure (Debug trap).
INT1
/// Call to Interrupt (Interrupt 3-trap to debugger).
INT3
/// Call to Interrupt (InteInterrupt 4-if overflow flag is 1).
INTO
/// Invalidate Internal Caches.
INVD
/// Invalidate Translations Derived from EPT.
INVEPT
/// Invalidate TLB Entries.
INVLPG
/// Invalidate Process-Context Identifier.
INVPCID
/// Invalidate Translations Based on VPID.
INVVPID
/// Return from interrupt.
IRET
/// Interrupt return (32-bit operand size).
IRETD
/// Interrupt return (64-bit operand size).
IRETQ
/// Interrupt return (16-bit operand size).
IRETW
/// Jump if Condition Is Met (Jump near if not below, CF = 0).
JAE
JNC
JNB
/// Jump if Condition Is Met (Jump short if below, CF = 1).
JC
JNAE
JB
/// Jump if Condition Is Met (Jump short if CX register is 0).
JCXZ
/// Jump if Condition Is Met (Jump short if ECX register is 0).
JECXZ
/// Jump if Condition Is Met (Jump near if not less, SF = OF).
JGE
JNL
/// Far jmp.
JMPFar
/// Near jmp.
JMPNear
/// Jump if Condition Is Met (Jump short if below or equal, CF = 1 or ZF).
JNA
JBE
/// Jump if Condition Is Met (Jump short if above, CF = 0 and ZF = 0).
JNBE
JA
/// Jump if Cond Is Met (Jump short if less or equal, ZF = 1 or SF <> OF).
JNG
JLE
/// Jump if Condition Is Met (Jump short if less, SF <> OF).
JNGE
JL
/// Jump if Condition Is Met (Jump short if greater, ZF = 0 and SF = OF).
JNLE
JG
/// Jump if Condition Is Met (Jump near if not overflow, OF = 0).
JNO
/// Jump if Condition Is Met (Jump near if not sign, SF = 0).
JNS
/// Jump if Condition Is Met (Jump near if not zero, ZF = 0).
JNZ
JNE
/// Jump if Condition Is Met (Jump near if overflow, OF = 1).
JO
/// Jump if Condition Is Met (Jump near if parity, PF = 1).
JP
JPE
/// Jump if Condition Is Met (Jump near if not parity, PF = 0).
JPO
JNP
/// Jump if Condition Is Met (Jump short if RCX register is 0).
JRCXZ
/// Jump if Condition Is Met (Jump short if sign, SF = 1).
JS
/// Jump if Condition Is Met (Jump short if zero, ZF = 1).
JZ
JE
/// Add two 8-bit opmasks.
KADDB
/// Add two 32-bit opmasks.
KADDD
/// Add two 64-bit opmasks.
KADDQ
/// Add two 16-bit opmasks.
KADDW
/// Logical AND two 8-bit opmasks.
KANDB
/// Logical AND two 32-bit opmasks.
KANDD
/// Logical AND NOT two 8-bit opmasks.
KANDNB
/// Logical AND NOT two 32-bit opmasks.
KANDND
/// Logical AND NOT two 64-bit opmasks.
KANDNQ
/// Logical AND NOT two 16-bit opmasks.
KANDNW
/// Logical AND two 64-bit opmasks.
KANDQ
/// Logical AND two 16-bit opmasks.
KANDW
/// Move from or move to opmask register of 8-bit data.
KMOVB
/// Move from or move to opmask register of 32-bit data.
KMOVD
/// Move from or move to opmask register of 64-bit data.
KMOVQ
/// Move from or move to opmask register of 16-bit data.
KMOVW
/// Bitwise NOT of two 8-bit opmasks.
KNOTB
/// Bitwise NOT of two 32-bit opmasks.
KNOTD
/// Bitwise NOT of two 64-bit opmasks.
KNOTQ
/// Bitwise NOT of two 16-bit opmasks.
KNOTW
/// Logical OR two 8-bit opmasks.
KORB
/// Logical OR two 32-bit opmasks.
KORD
/// Logical OR two 64-bit opmasks.
KORQ
/// Update EFLAGS according to the result of bitwise OR of two 8-bit opmasks.
KORTESTB
/// Update EFLAGS according to the result of bitwise OR of two 32-bit opmasks.
KORTESTD
/// Update EFLAGS according to the result of bitwise OR of two 64-bit opmasks.
KORTESTQ
/// Update EFLAGS according to the result of bitwise OR of two 16-bit opmasks.
KORTESTW
/// Logical OR two 16-bit opmasks.
KORW
/// Shift left 8-bitopmask by specified count.
KSHIFTLB
/// Shift left 32-bitopmask by specified count.
KSHIFTLD
/// Shift left 64-bitopmask by specified count.
KSHIFTLQ
/// Shift left 16-bitopmask by specified count.
KSHIFTLW
/// Shift right 8-bit opmask by specified count.
KSHIFTRB
/// Shift right 32-bit opmask by specified count.
KSHIFTRD
/// Shift right 64-bit opmask by specified count.
KSHIFTRQ
/// Shift right 16-bit opmask by specified count.
KSHIFTRW
/// Update EFLAGS according to result of bitwise TEST of two 8-bit opmasks.
KTESTB
/// Update EFLAGS according to result of bitwise TEST of two 32-bit opmasks.
KTESTD
/// Update EFLAGS according to result of bitwise TEST of two 64-bit opmasks.
KTESTQ
/// Update EFLAGS according to result of bitwise TEST of two 16-bit opmasks.
KTESTW
/// Unpack and interleave two 8-bit opmasks into 16-bit mask.
KUNPCKBW
/// Unpack and interleave two 32-bit opmasks into 64-bit mask.
KUNPCKDQ
/// Unpack and interleave two 16-bit opmasks into 32-bit mask.
KUNPCKWD
/// Bitwise logical XNOR of two 8-bit opmasks.
KXNORB
/// Bitwise logical XNOR of two 32-bit opmasks.
KXNORD
/// Bitwise logical XNOR of two 64-bit opmasks.
KXNORQ
/// Bitwise logical XNOR of two 16-bit opmasks.
KXNORW
/// Logical XOR of two 8-bit opmasks.
KXORB
/// Logical XOR of two 32-bit opmasks.
KXORD
/// Logical XOR of two 64-bit opmasks.
KXORQ
/// Logical XOR of two 16-bit opmasks.
KXORW
/// Load Status Flags into AH Register.
LAHF
/// Load Access Rights Byte.
LAR
/// Load Unaligned Integer 128 Bits.
LDDQU
/// Load MXCSR Register.
LDMXCSR
/// Load Far Pointer (DS).
LDS
/// Load Effective Address.
LEA
/// High Level Procedure Exit.
LEAVE
/// Load Far Pointer (ES).
LES
/// Load Fence.
LFENCE
/// Load Far Pointer (FS).
LFS
/// Load GlobalDescriptor Table Register.
LGDT
/// Load Far Pointer (GS).
LGS
/// Load Interrupt Descriptor Table Register.
LIDT
/// Load Local Descriptor Table Register.
LLDT
/// Load Machine Status Word.
LMSW
/// Assert LOCK# Signal Prefix.
LOCK
/// Load String (byte).
LODSB
/// Load String (doubleword).
LODSD
/// Load String (quadword).
LODSQ
/// Load String (word).
LODSW
/// Loop According to ECX Counter (count <> 0).
LOOP
/// Loop According to ECX Counter (count <> 0 and ZF = 1).
LOOPE
/// Loop According to ECX Counter (count <> 0 and ZF = 0).
LOOPNE
/// Load Segment Limit.
LSL
/// Load Far Pointer (SS).
LSS
/// Load Task Register.
LTR
/// the Number of Leading Zero Bits.
LZCNT
/// Store Selected Bytes of Double Quadword.
MASKMOVDQU
/// Store Selected Bytes of Quadword.
MASKMOVQ
/// Return Maximum Packed Double-Precision Floating-Point Values.
MAXPD
/// Return Maximum Packed Single-Precision Floating-Point Values.
MAXPS
/// Return Maximum Scalar Double-Precision Floating-Point Values.
MAXSD
/// Return Maximum Scalar Single-Precision Floating-Point Values.
MAXSS
/// Memory Fence.
MFENCE
/// Return Minimum Packed Double-Precision Floating-Point Values.
MINPD
/// Return Minimum Packed Single-Precision Floating-Point Values.
MINPS
/// Return Minimum Scalar Double-Precision Floating-Point Values.
MINSD
/// Return Minimum Scalar Single-Precision Floating-Point Values.
MINSS
/// Set Up Monitor Address.
MONITOR
/// MOV.
MOV
/// Move Aligned Packed Double-Precision Floating-Point Values.
MOVAPD
/// Move Aligned Packed Single-Precision Floating-Point Values.
MOVAPS
/// Move Data After Swapping Bytes.
MOVBE
/// Move Doubleword.
MOVD
/// Move One Double-FP and Duplicate.
MOVDDUP
/// Move Quadword from XMM to MMX Technology Register.
MOVDQ2Q
/// Move Aligned Double Quadword.
MOVDQA
/// Move Unaligned Double Quadword.
MOVDQU
/// Move Packed Single-Precision Floating-Point Values High to Low.
MOVHLPS
/// Move High Packed Double-Precision Floating-Point Value.
MOVHPD
/// Move High Packed Single-Precision Floating-Point Values.
MOVHPS
/// Move Packed Single-Precision Floating-Point Values Low to High.
MOVLHPS
/// Move Low Packed Double-Precision Floating-Point Value.
MOVLPD
/// Move Low Packed Single-Precision Floating-Point Values.
MOVLPS
/// Extract Packed Double-Precision Floating-Point Sign Mask.
MOVMSKPD
/// Extract Packed Single-Precision Floating-Point Sign Mask.
MOVMSKPS
/// Load Double Quadword Non-Temporal Aligned Hint.
MOVNTDQ
/// Load Double Quadword Non-Temporal Aligned Hint.
MOVNTDQA
/// Store Doubleword Using Non-Temporal Hint.
MOVNTI
/// Store Packed Double-Precision FP Values Using Non-Temporal Hint.
MOVNTPD
/// Store Packed Single-Precision FP Values Using Non-Temporal Hint.
MOVNTPS
/// Store of Quadword Using Non-Temporal Hint.
MOVNTQ
/// Move Quadword.
MOVQ
/// Move Quadword from MMX Technology to XMM Register.
MOVQ2DQ
/// Move Data from String to String (byte).
MOVSB
/// Move Data from String to String (doubleword).
MOVSD
/// Move Packed Single-FP High and Duplicate.
MOVSHDUP
/// Move Packed Single-FP Low and Duplicate.
MOVSLDUP
/// Move Data from String to String (quadword).
MOVSQ
/// Move Scalar Single-Precision Floating-Point Values.
MOVSS
/// Move Data from String to String (word).
MOVSW
/// Move with Sign-Extension.
MOVSX
/// Move with Sign-Extension (doubleword to quadword).
MOVSXD
/// Move Unaligned Packed Double-Precision Floating-Point Values.
MOVUPD
/// Move Unaligned Packed Single-Precision Floating-Point Values.
MOVUPS
/// Move with Zero-Extend.
MOVZX
/// Compute Multiple Packed Sums of Absolute Difference.
MPSADBW
/// Unsigned Multiply.
MUL
/// Multiply Packed Double-Precision Floating-Point Values.
MULPD
/// Multiply Packed Single-Precision Floating-Point Values.
MULPS
/// Multiply Scalar Double-Precision Floating-Point Values.
MULSD
/// Multiply Scalar Single-Precision Floating-Point Values.
MULSS
/// Unsigned multiply without affecting arithmetic flags.
MULX
/// Monitor Wait.
MWAIT
/// Two's Complement Negation.
NEG
/// No Operation.
NOP
/// One's Complement Negation.
NOT
/// Logical Inclusive OR.
OR
/// Bitwise Logical OR of Double-Precision Floating-Point Values.
ORPD
/// Bitwise Logical OR of Single-Precision Floating-Point Values.
ORPS
/// Output to Port.
OUT
/// Output String to Port.
OUTS
/// Output String to Port (byte).
OUTSB
/// Output String to Port (doubleword).
OUTSD
/// Output String to Port (word).
OUTSW
/// Computes the absolute value of each signed byte data element.
PABSB
/// Computes the absolute value of each signed 32-bit data element.
PABSD
/// Computes the absolute value of each signed 16-bit data element.
PABSW
/// Pack with Signed Saturation.
PACKSSDW
/// Pack with Signed Saturation.
PACKSSWB
/// Pack with Unsigned Saturation.
PACKUSDW
/// Pack with Unsigned Saturation.
PACKUSWB
/// Add Packed byte Integers.
PADDB
/// Add Packed Doubleword Integers.
PADDD
/// Add Packed Quadword Integers.
PADDQ
/// Add Packed Signed Integers with Signed Saturation (byte).
PADDSB
/// Add Packed Signed Integers with Signed Saturation (word).
PADDSW
/// Add Packed Unsigned Integers with Unsigned Saturation (byte).
PADDUSB
/// Add Packed Unsigned Integers with Unsigned Saturation (word).
PADDUSW
/// Add Packed word Integers.
PADDW
/// Packed Align Right.
PALIGNR
/// Logical AND.
PAND
/// Logical AND NOT.
PANDN
/// Spin Loop Hint.
PAUSE
/// Average Packed Integers (byte).
PAVGB
/// Average Packed Integers (word).
PAVGW
/// Variable Blend Packed Bytes.
PBLENDVB
/// Blend Packed Words.
PBLENDW
/// Perform carryless multiplication of two 64-bit numbers.
PCLMULQDQ
/// Compare Packed Data for Equal (byte).
PCMPEQB
/// Compare Packed Data for Equal (doubleword).
PCMPEQD
/// Compare Packed Data for Equal (quadword).
PCMPEQQ
/// Compare packed words for equal.
PCMPEQW
/// Packed Compare Explicit Length Strings, Return Index.
PCMPESTRI
/// Packed Compare Explicit Length Strings, Return Mask.
PCMPESTRM
/// Compare Packed Signed Integers for Greater Than (byte).
PCMPGTB
/// Compare Packed Signed Integers for Greater Than (doubleword).
PCMPGTD
/// Performs logical compare of greater-than on packed integer quadwords.
PCMPGTQ
/// Compare Packed Signed Integers for Greater Than (word).
PCMPGTW
/// Packed Compare Implicit Length Strings, Return Index.
PCMPISTRI
/// Packed Compare Implicit Length Strings, Return Mask.
PCMPISTRM
/// Parallel deposit of bits using a mask.
PDEP
/// Parallel extraction of bits using a mask.
PEXT
/// Extract Byte.
PEXTRB
/// Extract Dword.
PEXTRD
/// Extract Qword.
PEXTRQ
/// Extract Word.
PEXTRW
/// Packed Horizontal Add.
PHADDD
/// Packed Horizontal Add and Saturate.
PHADDSW
/// Packed Horizontal Add.
PHADDW
/// Packed Horizontal Word Minimum.
PHMINPOSUW
/// Packed Horizontal Subtract.
PHSUBD
/// Packed Horizontal Subtract and Saturate.
PHSUBSW
/// Packed Horizontal Subtract.
PHSUBW
/// Insert Byte.
PINSRB
/// Insert a dword value from 32-bit register or memory into an XMM register.
PINSRD
/// Insert a qword value from 64-bit register or memory into an XMM register.
PINSRQ
/// Insert Word.
PINSRW
/// Multiply and Add Packed Signed and Unsigned Bytes.
PMADDUBSW
/// Multiply and Add Packed Integers.
PMADDWD
/// Compare packed signed byte integers.
PMAXSB
/// Compare packed signed dword integers.
PMAXSD
/// Maximum of Packed Signed Word Integers.
PMAXSW
/// Maximum of Packed Unsigned Byte Integers.
PMAXUB
/// Compare packed unsigned dword integers.
PMAXUD
/// Compare packed unsigned word integers.
PMAXUW
/// Minimum of Packed Signed Byte Integers.
PMINSB
/// Compare packed signed dword integers.
PMINSD
/// Minimum of Packed Signed Word Integers.
PMINSW
/// Minimum of Packed Unsigned Byte Integers.
PMINUB
/// Minimum of Packed Dword Integers.
PMINUD
/// Compare packed unsigned word integers.
PMINUW
/// Move Byte Mask.
PMOVMSKB
/// Packed Move with Sign Extend.
PMOVSXBD
/// Packed Move with Sign Extend.
PMOVSXBQ
/// Packed Move with Sign Extend.
PMOVSXBW
/// Packed Move with Sign Extend.
PMOVSXDQ
/// Packed Move with Sign Extend.
PMOVSXWD
/// Packed Move with Sign Extend.
PMOVSXWQ
/// Packed Move with Zero Extend.
PMOVZXBD
/// Packed Move with Zero Extend.
PMOVZXBQ
/// Packed Move with Zero Extend.
PMOVZXBW
/// Packed Move with Zero Extend.
PMOVZXDQ
/// Packed Move with Zero Extend.
PMOVZXWD
/// Packed Move with Zero Extend.
PMOVZXWQ
/// Multiply Packed Doubleword Integers.
PMULDQ
/// Packed Multiply High with Round and Scale.
PMULHRSW
/// Multiply Packed Unsigned Integers and Store High Result.
PMULHUW
/// Multiply Packed Signed Integers and Store High Result.
PMULHW
/// Multiply Packed Integers and Store Low Result.
PMULLD
/// Multiply Packed Signed Integers and Store Low Result.
PMULLW
/// Multiply Packed Unsigned Doubleword Integers.
PMULUDQ
/// Pop a Value from the Stack.
POP
/// Pop All General-Purpose Registers (word).
POPA
/// Pop All General-Purpose Registers (doubleword).
POPAD
/// Return the Count of Number of Bits Set to 1.
POPCNT
/// Pop Stack into EFLAGS Register (lower 16bits EFLAGS).
POPF
/// Pop Stack into EFLAGS Register (EFLAGS).
POPFD
/// Pop Stack into EFLAGS Register (RFLAGS).
POPFQ
/// Bitwise Logical OR.
POR
/// Prefetch Data Into Caches (using NTA hint).
PREFETCHNTA
/// Prefetch Data Into Caches (using T0 hint).
PREFETCHT0
/// Prefetch Data Into Caches (using T1 hint).
PREFETCHT1
/// Prefetch Data Into Caches (using T2 hint).
PREFETCHT2
/// Prefetch Data into Caches in Anticipation of a Write.
PREFETCHW
/// Prefetch Vector Data Into Caches with Intent to Write and T1 Hint.
PREFETCHWT1
/// Compute Sum of Absolute Differences.
PSADBW
/// Packed Shuffle Bytes.
PSHUFB
/// Shuffle Packed Doublewords.
PSHUFD
/// Shuffle Packed High Words.
PSHUFHW
/// Shuffle Packed Low Words.
PSHUFLW
/// Shuffle Packed Words.
PSHUFW
/// Packed Sign Byte.
PSIGNB
/// Packed Sign Doubleword.
PSIGND
/// Packed Sign Word.
PSIGNW
/// Shift Packed Data Left Logical (doubleword).
PSLLD
/// Shift Double Quadword Left Logical.
PSLLDQ
/// Shift Packed Data Left Logical (quadword).
PSLLQ
/// Shift Packed Data Left Logical (word).
PSLLW
/// Shift Packed Data Right Arithmetic (doubleword).
PSRAD
/// Shift Packed Data Right Arithmetic (word).
PSRAW
/// Shift Packed Data Right Logical (doubleword).
PSRLD
/// Shift Double Quadword Right Logical.
PSRLDQ
/// Shift Packed Data Right Logical (quadword).
PSRLQ
/// Shift Packed Data Right Logical (word).
PSRLW
/// Subtract Packed Integers (byte).
PSUBB
/// Subtract Packed Integers (doubleword).
PSUBD
/// Subtract Packed Integers (quadword).
PSUBQ
/// Subtract Packed Signed Integers with Signed Saturation (byte).
PSUBSB
/// Subtract Packed Signed Integers with Signed Saturation (word).
PSUBSW
/// Subtract Packed Unsigned Integers with Unsigned Saturation (byte).
PSUBUSB
/// Subtract Packed Unsigned Integers with Unsigned Saturation (word).
PSUBUSW
/// Subtract Packed Integers (word).
PSUBW
/// Logical Compare.
PTEST
/// Unpack High Data.
PUNPCKHBW
/// Unpack High Data.
PUNPCKHDQ
/// Unpack High Data.
PUNPCKHQDQ
/// Unpack High Data.
PUNPCKHWD
/// Unpack Low Data.
PUNPCKLBW
/// Unpack Low Data.
PUNPCKLDQ
/// Unpack Low Data.
PUNPCKLQDQ
/// Unpack Low Data.
PUNPCKLWD
/// Push Word, Doubleword or Quadword Onto the Stack.
PUSH
/// Push All General-Purpose Registers (word).
PUSHA
/// Push All General-Purpose Registers (doubleword).
PUSHAD
/// Push EFLAGS Register onto the Stack (16bits of EFLAGS).
PUSHF
/// Push EFLAGS Register onto the Stack (EFLAGS).
PUSHFD
/// Push EFLAGS Register onto the Stack (RFLAGS).
PUSHFQ
/// Logical Exclusive OR.
PXOR
/// Rotate x bits (CF, r/m(x)) left once.
RCL
/// Compute reciprocals of packed single-precision floating-point values.
RCPPS
/// Compute reciprocal of scalar single-precision floating-point values.
RCPSS
/// Rotate x bits (CF, r/m(x)) right once.
RCR
/// Read FS Segment Base.
RDFSBASE
/// Read GS Segment Base.
RDGSBASE
/// Read from Model Specific Register.
RDMSR
/// Read Protection Key Rights for User Pages.
RDPKRU
/// Read Performance-Monitoring Counters.
RDPMC
/// Read Random Number.
RDRAND
/// Read Random SEED.
RDSEED
/// Read shadow stack point (SSP).
RDSSPD
/// Read shadow stack point (SSP).
RDSSPQ
/// Read Time-Stamp Counter.
RDTSC
/// Read Time-Stamp Counter and Processor ID.
RDTSCP
/// Repeat while ECX not zero.
REP
/// Repeat while equal/Repeat while zero.
REPE
/// Repeat while not equal/Repeat while not zero.
REPNE
/// Repeat while not equal/Repeat while not zero.
REPNZ
/// Repeat while equal/Repeat while zero.
REPZ
/// Far return.
RETFar
/// Far return w/ immediate.
RETFarImm
/// Near return.
RETNear
/// Near return w/ immediate .
RETNearImm
/// Rotate x bits r/m(x) left once.
ROL
/// Rotate x bits r/m(x) right once.
ROR
/// Rotate right without affecting arithmetic flags.
RORX
/// Round Packed Double Precision Floating-Point Values.
ROUNDPD
/// Round Packed Single Precision Floating-Point Values.
ROUNDPS
/// Round Scalar Double Precision Floating-Point Values.
ROUNDSD
/// Round Scalar Single Precision Floating-Point Values.
ROUNDSS
/// Resume from System Management Mode.
RSM
/// Compute reciprocals of square roots of packed single-precision FP values.
RSQRTPS
/// Compute reciprocal of square root of scalar single-precision FP values.
RSQRTSS
/// Restore a shadow stack pointer (SSP).
RSTORSSP
/// Store AH into Flags.
SAHF
/// Shift.
SAR
/// Shift arithmetic right.
SARX
/// Save previous shadow stack pointer (SSP).
SAVEPREVSSP
/// Integer Subtraction with Borrow.
SBB
/// Scan String (byte).
SCASB
/// Scan String (doubleword).
SCASD
/// Scan String (quadword).
SCASQ
/// Scan String (word).
SCASW
/// Set byte if above (CF = 0 and ZF = 0).
SETA
/// Set byte if below (CF = 1).
SETB
/// Set byte if below or equal (CF = 1 or ZF = 1).
SETBE
/// Set byte if greater (ZF = 0 and SF = OF).
SETG
/// Set byte if less (SF <> OF).
SETL
/// Set byte if less or equal (ZF = 1 or SF <> OF).
SETLE
/// Set byte if not below (CF = 0).
SETNB
/// Set byte if not less (SF = OF).
SETNL
/// Set byte if not overflow (OF = 0).
SETNO
/// Set byte if not parity (PF = 0).
SETNP
/// Set byte if not sign (SF = 0).
SETNS
/// Set byte if not zero (ZF = 0).
SETNZ
/// Set byte if overflow (OF = 1).
SETO
/// Set byte if parity (PF = 1).
SETP
/// Set byte if sign (SF = 1).
SETS
/// Set busy bit in a supervisor shadow stack token.
SETSSBSY
/// Set byte if sign (ZF = 1).
SETZ
/// Store Fence.
SFENCE
/// Store Global Descriptor Table Register.
SGDT
/// Perform an Intermediate Calculation for the Next Four SHA1 Message Dwords.
SHA1MSG1
/// Perform a Final Calculation for the Next Four SHA1 Message Dwords.
SHA1MSG2
/// Calculate SHA1 state E after four rounds.
SHA1NEXTE
/// Perform four rounds of SHA1 operations.
SHA1RNDS4
/// Perform an intermediate calculation for the next 4 SHA256 message dwords.
SHA256MSG1
/// Perform the final calculation for the next four SHA256 message dwords.
SHA256MSG2
/// Perform two rounds of SHA256 operations.
SHA256RNDS2
/// Shift.
SHL
/// Double Precision Shift Left.
SHLD
/// Shift logic left.
SHLX
/// Shift.
SHR
/// Double Precision Shift Right.
SHRD
/// Shift logic right.
SHRX
/// Shuffle Packed Double-Precision Floating-Point Values.
SHUFPD
/// Shuffle Packed Single-Precision Floating-Point Values.
SHUFPS
/// Store Interrupt Descriptor Table Register.
SIDT
/// Store Local Descriptor Table Register.
SLDT
/// Store Machine Status Word.
SMSW
/// Compute packed square roots of packed double-precision FP values.
SQRTPD
/// Compute square roots of packed single-precision floating-point values.
SQRTPS
/// Compute scalar square root of scalar double-precision FP values.
SQRTSD
/// Compute square root of scalar single-precision floating-point values.
SQRTSS
/// Set AC Flag in EFLAGS Register.
STAC
/// Set Carry Flag.
STC
/// Set Direction Flag.
STD
/// Set Interrupt Flag.
STI
/// Store MXCSR Register State.
STMXCSR
/// Store String (store AL).
STOSB
/// Store String (store EAX).
STOSD
/// Store String (store RAX).
STOSQ
/// Store String (store AX).
STOSW
/// Store Task Register.
STR
/// Subtract.
SUB
/// Subtract Packed Double-Precision Floating-Point Values.
SUBPD
/// Subtract Packed Single-Precision Floating-Point Values.
SUBPS
/// Subtract Scalar Double-Precision Floating-Point Values.
SUBSD
/// Subtract Scalar Single-Precision Floating-Point Values.
SUBSS
/// Swap GS Base Register.
SWAPGS
/// Fast System Call.
SYSCALL
/// Fast System Call.
SYSENTER
/// Fast Return from Fast System Call.
SYSEXIT
/// Return From Fast System Call.
SYSRET
/// Logical Compare.
TEST
/// Count the Number of Trailing Zero Bits.
TZCNT
/// Unordered Compare Scalar Double-Precision FP Values and Set EFLAGS.
UCOMISD
/// Unordered Compare Scalar Single-Precision FPValues and Set EFLAGS.
UCOMISS
/// Undefined instruction (Raise invalid opcode exception).
UD0
/// Undefined Instruction (Raise invalid opcode exception).
UD1
/// Undefined Instruction (Raise invalid opcode exception).
UD2
/// Unpack and Interleave High Packed Double-Precision Floating-Point Values.
UNPCKHPD
/// Unpack and Interleave High Packed Single-Precision Floating-Point Values.
UNPCKHPS
/// Unpack and Interleave Low Packed Double-Precision Floating-Point Values.
UNPCKLPD
/// Unpack and Interleave Low Packed Single-Precision Floating-Point Values.
UNPCKLPS
/// Packed Single-Precision Floating-Point Fused Multiply-Add.
V4FMADDPS
/// Scalar Single-Precision Floating-Point Fused Multiply-Add.
V4FMADDSS
/// Packed Single-Precision Floating-Point Fused Multiply-Add and Negate.
V4FNMADDPS
/// Scalar Single-Precision Floating-Point Fused Multiply-Add and Negate.
V4FNMADDSS
/// Add Packed Double-Precision Floating-Point Values.
VADDPD
/// Add Packed Double-Precision Floating-Point Values.
VADDPS
/// Add Scalar Double-Precision Floating-Point Values.
VADDSD
/// Add Scalar Single-Precision Floating-Point Values.
VADDSS
/// Packed Double-FP Add/Subtract.
VADDSUBPD
/// Packed Single-FP Add/Subtract.
VADDSUBPS
/// Perform One Round of an AES Decryption Flow.
VAESDEC
/// Perform Last Round of an AES Decryption Flow.
VAESDECLAST
/// Perform One Round of an AES Encryption Flow.
VAESENC
/// Perform Last Round of an AES Encryption Flow.
VAESENCLAST
/// Perform dword alignment of two concatenated source vectors.
VALIGND
/// Perform qword alignment of two concatenated source vectors.
VALIGNQ
/// Bitwise Logical AND of Packed Double-Precision Floating-Point Values.
VANDNPD
/// Bitwise Logical AND of Packed Single-Precision Floating-Point Values.
VANDNPS
/// Bitwise Logical AND NOT of Packed Double-Precision Floating-Point Values.
VANDPD
/// Bitwise Logical AND NOT of Packed Single-Precision Floating-Point Values.
VANDPS
/// Replace the VBLENDVPD instructions (using opmask as select control).
VBLENDMPD
/// Replace the VBLENDVPS instructions (using opmask as select control).
VBLENDMPS
/// Blend Packed Double-Precision Floats.
VBLENDPD
/// Blend Packed Single-Precision Floats.
VBLENDPS
/// Variable Blend Packed Double-Precision Floats.
VBLENDVPD
/// Variable Blend Packed Single-Precision Floats.
VBLENDVPS
/// Load with Broadcast Floating-Point Data.
VBROADCASTF128
/// Broadcast 128 bits of int data in mem to low and high 128-bits in ymm1.
VBROADCASTI128
/// Broadcast two dword elements.
VBROADCASTI32X2
/// Broadcast four dword elements.
VBROADCASTI32X4
/// Broadcast eight dword elements.
VBROADCASTI32X8
/// Broadcast two qword elements.
VBROADCASTI64X2
/// Broadcast four qword elements.
VBROADCASTI64X4
/// Broadcast low double-precision floating-point element.
VBROADCASTSD
/// Broadcast Floating-Point Data.
VBROADCASTSS
/// Compare Packed Double-Precision Floating-Point Values.
VCMPPD
/// Compare Packed Single-Precision Floating-Point Values.
VCMPPS
/// Compare Scalar Double-Precision Floating-Point Values.
VCMPSD
/// Scalar Single-Precision Floating-Point Values.
VCMPSS
/// Compare Scalar Ordered Double-Precision FP Values and Set EFLAGS.
VCOMISD
/// Compare Scalar Ordered Single-Precision FP Values and Set EFLAGS.
VCOMISS
/// Compress packed DP elements of a vector.
VCOMPRESSPD
/// Compress packed SP elements of a vector.
VCOMPRESSPS
/// Convert two packed signed doubleword integers.
VCVTDQ2PD
/// Convert Packed Dword Integers to Packed Single-Precision FP Values.
VCVTDQ2PS
/// Convert Two Packed Single Data to One Packed BF16 Data.
VCVTNE2PS2BF16
/// Convert Packed Single Data to Packed BF16 Data.
VCVTNEPS2BF16
/// Convert Packed Double-Precision FP Values to Packed Doubleword Integers.
VCVTPD2DQ
/// Convert two packed double-precision floating-point values.
VCVTPD2PS
/// Convert Packed Double-Precision FP Values to Packed Quadword Integers.
VCVTPD2QQ
/// Convert Packed DP FP Values to Packed Unsigned DWord Integers.
VCVTPD2UDQ
/// Convert Packed DP FP Values to Packed Unsigned QWord Integers.
VCVTPD2UQQ
/// Convert 16-bit FP values to Single-Precision FP values.
VCVTPH2PS
/// Conv Packed Single-Precision FP Values to Packed Signed DWord Int Values.
VCVTPS2DQ
/// Conv Packed Single-Precision FP Values to Packed Dbl-Precision FP Values.
VCVTPS2PD
/// Convert Single-Precision FP value to 16-bit FP value.
VCVTPS2PH
/// Convert Packed SP FP Values to Packed Signed QWord Int Values.
VCVTPS2QQ
/// Convert Packed SP FP Values to Packed Unsigned DWord Int Values.
VCVTPS2UDQ
/// Convert Packed SP FP Values to Packed Unsigned QWord Int Values.
VCVTPS2UQQ
/// Convert Packed Quadword Integers to Packed Double-Precision FP Values.
VCVTQQ2PD
/// Convert Packed Quadword Integers to Packed Single-Precision FP Values.
VCVTQQ2PS
/// Convert Scalar Double-Precision FP Value to Integer.
VCVTSD2SI
/// Convert Scalar Double-Precision FP Val to Scalar Single-Precision FP Val.
VCVTSD2SS
/// Convert Scalar Double-Precision FP Value to Unsigned Doubleword Integer.
VCVTSD2USI
/// Convert Dword Integer to Scalar Double-Precision FP Value.
VCVTSI2SD
/// Convert Dword Integer to Scalar Single-Precision FP Value.
VCVTSI2SS
/// Convert Scalar Single-Precision FP Val to Scalar Double-Precision FP Val.
VCVTSS2SD
/// Convert Scalar Single-Precision FP Value to Dword Integer.
VCVTSS2SI
/// Convert Scalar Single-Precision FP Value to Unsigned Doubleword Integer.
VCVTSS2USI
/// Conv with Trunc Packed Double-Precision FP Val to Packed Dword Integers.
VCVTTPD2DQ
/// Convert with Truncation Packed DP FP Values to Packed QWord Integers.
VCVTTPD2QQ
/// Convert with Truncation Packed DP FP Values to Packed Unsigned DWord Int.
VCVTTPD2UDQ
/// Convert with Truncation Packed DP FP Values to Packed Unsigned QWord Int.
VCVTTPD2UQQ
/// Conv with Trunc Packed Single-Precision FP Val to Packed Dword Integers.
VCVTTPS2DQ
/// Convert with Truncation Packed SP FP Values to Packed Signed QWord Int.
VCVTTPS2QQ
/// Convert with Truncation Packed SP FP Values to Packed Unsigned DWord Int.
VCVTTPS2UDQ
/// Convert with Truncation Packed SP FP Values to Packed Unsigned QWord Int.
VCVTTPS2UQQ
/// Convert with Truncation Scalar Double-Precision FP Value to Signed.
VCVTTSD2SI
/// Convert with Truncation Scalar DP FP Value to Unsigned Integer.
VCVTTSD2USI
/// Convert with Truncation Scalar Single-Precision FP Value to Dword Integer.
VCVTTSS2SI
/// Convert with Truncation Scalar Single-Precision FP Value to Unsigned Int.
VCVTTSS2USI
/// Convert Packed Unsigned DWord Integers to Packed DP FP Values.
VCVTUDQ2PD
/// Convert Packed Unsigned DWord Integers to Packed SP FP Values.
VCVTUDQ2PS
/// Convert Packed Unsigned QWord Integers to Packed DP FP Values.
VCVTUQQ2PD
/// Convert Packed Unsigned QWord Integers to Packed SP FP Values.
VCVTUQQ2PS
/// Convert an signed integer to the low DP FP elem and merge to a vector.
VCVTUSI2SD
/// Convert an signed integer to the low SP FP elem and merge to a vector.
VCVTUSI2SS
/// Convert an unsigned integer to the low DP FP elem and merge to a vector.
VCVTUSI2USD
/// Convert an unsigned integer to the low SP FP elem and merge to a vector.
VCVTUSI2USS
/// Double Block Packed Sum-Absolute-Differences (SAD) on Unsigned Bytes.
VDBPSADBW
/// Divide Packed Double-Precision Floating-Point Values.
VDIVPD
/// Divide Packed Single-Precision Floating-Point Values.
VDIVPS
/// Divide Scalar Double-Precision Floating-Point Values.
VDIVSD
/// Divide Scalar Single-Precision Floating-Point Values.
VDIVSS
/// Dot Product of BF16 Pairs Accumulated into Packed Single Precision.
VDPBF16PS
/// Packed Double-Precision Dot Products.
VDPPD
/// Packed Single-Precision Dot Products.
VDPPS
/// Verify a Segment for Reading.
VERR
/// Verify a Segment for Writing.
VERW
/// Compute approximate base-2 exponential of packed DP FP elems of a vector.
VEXP2PD
/// Compute approximate base-2 exponential of packed SP FP elems of a vector.
VEXP2PS
/// Compute approximate base-2 exponential of the low DP FP elem of a vector.
VEXP2SD
/// Compute approximate base-2 exponential of the low SP FP elem of a vector.
VEXP2SS
/// Load Sparse Packed Double-Precision FP Values from Dense Memory.
VEXPANDPD
/// Load Sparse Packed Single-Precision FP Values from Dense Memory.
VEXPANDPS
/// Extract Packed Floating-Point Values.
VEXTRACTF128
/// Extract a vector from a full-length vector with 32-bit granular update.
VEXTRACTF32X4
/// Extract a vector from a full-length vector with 32-bit granular update.
VEXTRACTF32X8
/// Extract a vector from a full-length vector with 64-bit granular update.
VEXTRACTF64X2
/// Extract a vector from a full-length vector with 64-bit granular update.
VEXTRACTF64X4
/// Extract packed Integer Values.
VEXTRACTI128
/// Extract a vector from a full-length vector with 32-bit granular update.
VEXTRACTI32X4
/// Extract a vector from a full-length vector with 32-bit granular update.
VEXTRACTI32X8
/// Extract a vector from a full-length vector with 64-bit granular update.
VEXTRACTI64X2
/// Extract a vector from a full-length vector with 64-bit granular update.
VEXTRACTI64X4
/// Extract From Packed Single-Precision Floats.
VEXTRACTPS
/// Fix Up Special Packed Float64 Values.
VFIXUPIMMPD
/// Fix Up Special Packed Float32 Values.
VFIXUPIMMPS
/// Fix Up Special Scalar Float64 Value.
VFIXUPIMMSD
/// Fix Up Special Scalar Float32 Value.
VFIXUPIMMSS
/// Fused Multiply-Add of Packed Double-Precision Floating-Point Values.
VFMADD132PD
/// Fused Multiply-Add of Packed Single-Precision Floating-Point Values.
VFMADD132PS
/// Fused Multiply-Add of Scalar Double-Precision Floating-Point Values.
VFMADD132SD
/// Fused Multiply-Add of Scalar Single-Precision Floating-Point Values.
VFMADD132SS
/// Fused Multiply-Add of Packed Double-Precision Floating-Point Values.
VFMADD213PD
/// Fused Multiply-Add of Packed Single-Precision Floating-Point Values.
VFMADD213PS
/// Fused Multiply-Add of Scalar Double-Precision Floating-Point Values.
VFMADD213SD
/// Fused Multiply-Add of Scalar Single-Precision Floating-Point Values.
VFMADD213SS
/// Fused Multiply-Add of Packed Double-Precision Floating-Point Value.
VFMADD231PD
/// Fused Multiply-Add of Packed Single-Precision Floating-Point Values.
VFMADD231PS
/// Fused Multiply-Add of Scalar Double-Precision Floating-Point Values.
VFMADD231SD
/// Fused Multiply-Add of Scalar Single-Precision Floating-Point Values.
VFMADD231SS
/// Multiply and Add Packed Double-Precision Floating-Point(Only AMD).
VFMADDPD
/// Multiply and Add Packed Single-Precision Floating-Point(Only AMD).
VFMADDPS
/// Multiply and Add Scalar Double-Precision Floating-Point(Only AMD).
VFMADDSD
/// Multiply and Add Scalar Single-Precision Floating-Point(Only AMD).
VFMADDSS
/// Fused Multiply-Alternating Add/Sub of Packed Double-Precision FP Values.
VFMADDSUB132PD
/// Fused Multiply-Alternating Add/Sub of Packed Single-Precision FP Values.
VFMADDSUB132PS
/// Fused Multiply-Alternating Add/Sub of Packed Double-Precision FP Values.
VFMADDSUB213PD
/// Fused Multiply-Alternating Add/Sub of Packed Single-Precision FP Values.
VFMADDSUB213PS
/// Fused Multiply-Alternating Add/Sub of Packed Double-Precision FP Values.
VFMADDSUB231PD
/// Fused Multiply-Alternating Add/Sub of Packed Single-Precision FP Values.
VFMADDSUB231PS
/// Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values.
VFMSUB132PD
/// Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values.
VFMSUB132PS
/// Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
VFMSUB132SD
/// Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
VFMSUB132SS
/// Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values.
VFMSUB213PD
/// Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values.
VFMSUB213PS
/// Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
VFMSUB213SD
/// Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
VFMSUB213SS
/// Fused Multiply-Subtract of Packed Double-Precision Floating-Point Values.
VFMSUB231PD
/// Fused Multiply-Subtract of Packed Single-Precision Floating-Point Values.
VFMSUB231PS
/// Fused Multiply-Subtract of Scalar Double-Precision Floating-Point Values.
VFMSUB231SD
/// Fused Multiply-Subtract of Scalar Single-Precision Floating-Point Values.
VFMSUB231SS
/// Fused Multiply-Alternating Sub/Add of Packed Double-Precision FP Values.
VFMSUBADD132PD
/// Fused Multiply-Alternating Sub/Add of Packed Single-Precision FP Values.
VFMSUBADD132PS
/// Fused Multiply-Alternating Sub/Add of Packed Double-Precision FP Values.
VFMSUBADD213PD
/// Fused Multiply-Alternating Sub/Add of Packed Single-Precision FP Values.
VFMSUBADD213PS
/// Fused Multiply-Alternating Sub/Add of Packed Double-Precision FP Values.
VFMSUBADD231PD
/// Fused Multiply-Alternating Sub/Add of Packed Single-Precision FP Values.
VFMSUBADD231PS
/// Fused Negative Multiply-Add of Packed Double-Precision FP Values.
VFNMADD132PD
/// Fused Negative Mul-Add of Packed Single-Precision Floating-Point Values.
VFNMADD132PS
/// Fused Negative Multiply-Add of Scalar Double-Precision FP Values.
VFNMADD132SD
/// Fused Negative Mul-Add of Scalar Single-Precision Floating-Point Values.
VFNMADD132SS
/// Fused Negative Multiply-Add of Packed Double-Precision FP Values.
VFNMADD213PD
/// Fused Negative Mul-Add of Packed Single-Precision Floating-Point Values.
VFNMADD213PS
/// Fused Negative Multiply-Add of Scalar Double-Precision FP Values.
VFNMADD213SD
/// Fused Negative Mul-Add of Scalar Single-Precision Floating-Point Values.
VFNMADD213SS
/// Fused Negative Multiply-Add of Packed Double-Precision FP Values.
VFNMADD231PD
/// Fused Negative Mul-Add of Packed Single-Precision Floating-Point Values.
VFNMADD231PS
/// Fused Negative Multiply-Add of Scalar Double-Precision FP Values.
VFNMADD231SD
/// Fused Negative Mul-Add of Scalar Single-Precision Floating-Point Values.
VFNMADD231SS
/// Fused Negative Multiply-Subtract of Packed Double-Precision FP Values.
VFNMSUB132PD
/// Fused Negative Multiply-Subtract of Packed Single-Precision FP Values.
VFNMSUB132PS
/// Fused Negative Multiply-Subtract of Scalar Double-Precision FP Values.
VFNMSUB132SD
/// Fused Negative Multiply-Subtract of Scalar Single-Precision FP Values.
VFNMSUB132SS
/// Fused Negative Multiply-Subtract of Packed Double-Precision FP Values.
VFNMSUB213PD
/// Fused Negative Multiply-Subtract of Packed Single-Precision FP Values.
VFNMSUB213PS
/// Fused Negative Multiply-Subtract of Scalar Double-Precision FP Values.
VFNMSUB213SD
/// Fused Negative Multiply-Subtract of Scalar Single-Precision FP Values.
VFNMSUB213SS
/// Fused Negative Multiply-Subtract of Packed Double-Precision FP Values.
VFNMSUB231PD
/// Fused Negative Multiply-Subtract of Packed Single-Precision FP Values.
VFNMSUB231PS
/// Fused Negative Multiply-Subtract of Scalar Double-Precision FP Values.
VFNMSUB231SD
/// Fused Negative Multiply-Subtract of Scalar Single-Precision FP Values.
VFNMSUB231SS
/// Tests Types Of a Packed Float64 Values.
VFPCLASSPD
/// Tests Types Of a Packed Float32 Values.
VFPCLASSPS
/// Tests Types Of a Scalar Float64 Values.
VFPCLASSSD
/// Tests Types Of a Scalar Float32 Values.
VFPCLASSSS
/// Gather Packed DP FP Values Using Signed Dword/Qword Indices.
VGATHERDPD
/// Gather Packed SP FP values Using Signed Dword/Qword Indices.
VGATHERDPS
/// Sparse prefetch of packed DP FP vector with T0 hint using dword indices.
VGATHERPF0DPD
/// Sparse prefetch of packed SP FP vector with T0 hint using dword indices.
VGATHERPF0DPS
/// Sparse prefetch of packed DP FP vector with T0 hint using qword indices.
VGATHERPF0QPD
/// Sparse prefetch of packed SP FP vector with T0 hint using qword indices.
VGATHERPF0QPS
/// Sparse prefetch of packed DP FP vector with T1 hint using dword indices.
VGATHERPF1DPD
/// Sparse prefetch of packed SP FP vector with T1 hint using dword indices.
VGATHERPF1DPS
/// Sparse prefetch of packed DP FP vector with T1 hint using qword indices.
VGATHERPF1QPD
/// Sparse prefetch of packed SP FP vector with T1 hint using qword indices.
VGATHERPF1QPS
/// Gather Packed DP FP Values Using Signed Dword/Qword Indices.
VGATHERQPD
/// Gather Packed SP FP values Using Signed Dword/Qword Indices.
VGATHERQPS
/// Convert Exponents of Packed DP FP Values to DP FP Values.
VGETEXPPD
/// Convert Exponents of Packed SP FP Values to SP FP Values.
VGETEXPPS
/// Convert Exponents of Scalar DP FP Values to DP FP Value.
VGETEXPSD
/// Convert Exponents of Scalar SP FP Values to SP FP Value.
VGETEXPSS
/// Extract Float64 Vector of Normalized Mantissas from Float64 Vector.
VGETMANTPD
/// Extract Float32 Vector of Normalized Mantissas from Float32 Vector.
VGETMANTPS
/// Extract Float64 of Normalized Mantissas from Float64 Scalar.
VGETMANTSD
/// Extract Float32 Vector of Normalized Mantissa from Float32 Vector.
VGETMANTSS
/// Galois Field Affine Transformation Inverse.
VGF2P8AFFINEINVQB
/// Galois Field Affine Transformation.
VGF2P8AFFINEQB
/// Galois Field Multiply Bytes.
VGF2P8MULB
/// Packed Double-FP Horizontal Add.
VHADDPD
/// Packed Single-FP Horizontal Add.
VHADDPS
/// Packed Double-FP Horizontal Subtract.
VHSUBPD
/// Packed Single-FP Horizontal Subtract.
VHSUBPS
/// Insert Packed Floating-Point Values.
VINSERTF128
/// Insert Packed Floating-Point Values.
VINSERTF32X4
/// Insert Packed Floating-Point Values.
VINSERTF64X2
/// Insert Packed Floating-Point Values.
VINSERTF64X4
/// Insert Packed Integer Values.
VINSERTI128
/// Insert 256 bits of packed doubleword integer values.
VINSERTI32X8
/// Insert Packed Floating-Point Values.
VINSERTI64X2
/// Insert 256 bits of packed quadword integer values.
VINSERTI64X4
/// Insert Into Packed Single-Precision Floats.
VINSERTPS
/// Load Unaligned Integer 128 Bits.
VLDDQU
/// Store Selected Bytes of Double Quadword.
VMASKMOVDQU
/// Conditional SIMD Packed Loads and Stores.
VMASKMOVPD
/// Conditional SIMD Packed Loads and Stores.
VMASKMOVPS
/// Return Maximum Packed Double-Precision Floating-Point Values.
VMAXPD
/// Maximum of Packed Single-Precision Floating-Point Values.
VMAXPS
/// Return Maximum Scalar Double-Precision Floating-Point Value.
VMAXSD
/// Return Maximum Scalar Single-Precision Floating-Point Value.
VMAXSS
/// Call to VM Monitor.
VMCALL
/// Clear Virtual-Machine Control Structure.
VMCLEAR
/// Invoke VM function.
VMFUNC
/// Return Minimum Packed Double-Precision Floating-Point Values.
VMINPD
/// Return Minimum Packed Single-Precision Floating-Point Values.
VMINPS
/// Return Minimum Scalar Double-Precision Floating-Point Value.
VMINSD
/// Return Minimum Scalar Single-Precision Floating-Point Value.
VMINSS
/// Launch Virtual Machine.
VMLAUNCH
/// Move Aligned Packed Double-Precision Floating-Point Values.
VMOVAPD
/// Move Aligned Packed Single-Precision Floating-Point Values.
VMOVAPS
/// Move Doubleword.
VMOVD
/// Move One Double-FP and Duplicate.
VMOVDDUP
/// Move Aligned Double Quadword.
VMOVDQA
/// Move Aligned Double Quadword.
VMOVDQA32
/// Move Aligned Double Quadword.
VMOVDQA64
/// Move Unaligned Double Quadword.
VMOVDQU
/// VMOVDQU with 16-bit granular conditional update.
VMOVDQU16
/// Move Unaligned Double Quadword.
VMOVDQU32
/// Move Unaligned Double Quadword.
VMOVDQU64
/// VMOVDQU with 8-bit granular conditional update.
VMOVDQU8
/// Move Packed Single-Precision Floating-Point Values High to Low.
VMOVHLPS
/// Move High Packed Double-Precision Floating-Point Value.
VMOVHPD
/// Move High Packed Single-Precision Floating-Point Values.
VMOVHPS
/// Move Packed Single-Precision Floating-Point Values Low to High.
VMOVLHPS
/// Move Low Packed Double-Precision Floating-Point Value.
VMOVLPD
/// Move Low Packed Single-Precision Floating-Point Values.
VMOVLPS
/// Extract Packed Double-Precision Floating-Point Sign Mask.
VMOVMSKPD
/// Extract Packed Single-Precision Floating-Point Sign Mask.
VMOVMSKPS
/// Load Double Quadword Non-Temporal Aligned Hint.
VMOVNTDQ
/// Load Double Quadword Non-temporal Aligned.
VMOVNTDQA
/// Store Packed Double-Precision FP Values Using Non-Temporal Hint.
VMOVNTPD
/// Store Packed Single-Precision FP Values Using Non-Temporal Hint.
VMOVNTPS
/// Move Quadword.
VMOVQ
/// Move Data from String to String (doubleword).
VMOVSD
/// Move Packed Single-FP High and Duplicate.
VMOVSHDUP
/// Move Packed Single-FP Low and Duplicate.
VMOVSLDUP
/// Move Scalar Single-Precision Floating-Point Values.
VMOVSS
/// Move Unaligned Packed Double-Precision Floating-Point Values.
VMOVUPD
/// Move Unaligned Packed Single-Precision Floating-Point Values.
VMOVUPS
/// Compute Multiple Packed Sums of Absolute Difference.
VMPSADBW
/// Load Pointer to Virtual-Machine Control Structure.
VMPTRLD
/// Store Pointer to Virtual-Machine Control Structure.
VMPTRST
/// Reads a component from the VMCS and stores it into a destination operand.
VMREAD
/// Resume Virtual Machine.
VMRESUME
/// Multiply Packed Double-Precision Floating-Point Values.
VMULPD
/// Multiply Packed Single-Precision Floating-Point Values.
VMULPS
/// Multiply Scalar Double-Precision Floating-Point Values.
VMULSD
/// Multiply Scalar Single-Precision Floating-Point Values.
VMULSS
/// Writes a component to the VMCS from a source operand.
VMWRITE
/// Leave VMX Operation.
VMXOFF
/// Enter VMX Operation.
VMXON
/// Bitwise Logical OR of Double-Precision Floating-Point Values.
VORPD
/// Bitwise Logical OR of Single-Precision Floating-Point Values.
VORPS
/// Compute Intersection Between dwords.
VP2INTERSECTD
/// Compute Intersection Between qwords.
VP2INTERSECTQ
/// Dot Product of Signed Words with Dword Accumulation.
VP4DPWSSD
/// Dot Product of Signed Words with Dword Accumulation and Saturation.
VP4DPWSSDS
/// Packed Absolute Value (byte).
VPABSB
/// Packed Absolute Value (dword).
VPABSD
/// Packed Absolute Value (qword).
VPABSQ
/// Packed Absolute Value (word).
VPABSW
/// Pack with Signed Saturation.
VPACKSSDW
/// Pack with Signed Saturation.
VPACKSSWB
/// Pack with Unsigned Saturation.
VPACKUSDW
/// Pack with Unsigned Saturation.
VPACKUSWB
/// Add Packed byte Integers.
VPADDB
/// Add Packed Doubleword Integers.
VPADDD
/// Add Packed Quadword Integers.
VPADDQ
/// Add Packed Signed Integers with Signed Saturation (byte).
VPADDSB
/// Add Packed Signed Integers with Signed Saturation (word).
VPADDSW
/// Add Packed Unsigned Integers with Unsigned Saturation (byte).
VPADDUSB
/// Add Packed Unsigned Integers with Unsigned Saturation (word).
VPADDUSW
/// Add Packed word Integers.
VPADDW
/// Packed Align Right.
VPALIGNR
/// Logical AND.
VPAND
/// Logical AND NOT.
VPANDN
/// Average Packed Integers (byte).
VPAVGB
/// Average Packed Integers (word).
VPAVGW
/// Blend Packed Dwords.
VPBLENDD
/// Blend Byte/Word Vectors Using an Opmask Control.
VPBLENDMB
/// Blend Int32/Int64 Vectors Using an OpMask Control.
VPBLENDMD
/// Blend qword elements using opmask as select control.
VPBLENDMQ
/// Blend word elements using opmask as select control.
VPBLENDMW
/// Variable Blend Packed Bytes.
VPBLENDVB
/// Blend Packed Words.
VPBLENDW
/// Broadcast Integer Data.
VPBROADCASTB
/// Broadcast from general-purpose register to vector register.
VPBROADCASTD
/// Broadcast Mask to Vector Register.
VPBROADCASTM
/// Broadcast low byte value in k1.
VPBROADCASTMB2Q
/// Broadcast low word value in k1.
VPBROADCASTMW2D
/// Broadcast from general-purpose register to vector register.
VPBROADCASTQ
/// Broadcast from general-purpose register to vector register.
VPBROADCASTW
/// Carry-Less Multiplication Quadword.
VPCLMULQDQ
/// Compare packed signed bytes using specified primitive.
VPCMPB
/// Compare packed signed dwords using specified primitive.
VPCMPD
/// Compare Packed Data for Equal (byte).
VPCMPEQB
/// Compare Packed Data for Equal (doubleword).
VPCMPEQD
/// Compare Packed Data for Equal (quadword).
VPCMPEQQ
/// Compare Packed Data for Equal (word).
VPCMPEQW
/// Packed Compare Explicit Length Strings, Return Index.
VPCMPESTRI
/// Packed Compare Explicit Length Strings, Return Mask.
VPCMPESTRM
/// Compare Packed Signed Integers for Greater Than (byte).
VPCMPGTB
/// Compare Packed Signed Integers for Greater Than (doubleword).
VPCMPGTD
/// Compare Packed Data for Greater Than (qword).
VPCMPGTQ
/// Compare Packed Signed Integers for Greater Than (word).
VPCMPGTW
/// Packed Compare Implicit Length Strings, Return Index.
VPCMPISTRI
/// Packed Compare Implicit Length Strings, Return Mask.
VPCMPISTRM
/// Compare packed signed quadwords using specified primitive.
VPCMPQ
/// Compare packed unsigned bytes using specified primitive.
VPCMPUB
/// Compare packed unsigned dwords using specified primitive.
VPCMPUD
/// Compare packed unsigned quadwords using specified primitive.
VPCMPUQ
/// Compare packed unsigned words using specified primitive.
VPCMPUW
/// Compare packed signed words using specified primitive.
VPCMPW
/// Compare packed unsigned bytes using specified primitive.
VPCMUB
/// Compare packed unsigned dwords using specified primitive.
VPCMUD
/// Compare packed unsigned quadwords using specified primitive.
VPCMUQ
/// Compare packed unsigned words using specified primitive.
VPCMUW
/// Store Sparse Packed Byte Integer Values into Dense Memory/Register.
VPCOMPRESSB
/// Store Sparse Packed Doubleword Integer Values into Dense Memory/Register.
VPCOMPRESSD
/// Store Sparse Packed Quadword Integer Values into Dense Memory/Register.
VPCOMPRESSQ
/// Store Sparse Packed Word Integer Values into Dense Memory/Register.
VPCOMPRESSW
/// Detect conflicts within a vector of packed 32/64-bit integers.
VPCONFLICTD
/// Detect conflicts within a vector of packed 64-bit integers.
VPCONFLICTQ
/// Multiply and Add Unsigned and Signed Bytes.
VPDPBUSD
/// Multiply and Add Unsigned and Signed Bytes with Saturation.
VPDPBUSDS
/// Multiply and Add Signed Word Integers.
VPDPWSSD
/// Multiply and Add Signed Word Integers with Saturation.
VPDPWSSDS
/// Permute Floating-Point Values.
VPERM2F128
/// Permute Integer Values.
VPERM2I128
/// Permute packed bytes elements.
VPERMB
/// Permute Packed Doublewords/Words Elements.
VPERMD
/// Full Permute of Bytes from Two Tables Overwriting the Index.
VPERMI2B
/// Full permute of two tables of dword elements overwriting the index vector.
VPERMI2D
/// Full permute of two tables of DP elements overwriting the index vector.
VPERMI2PD
/// Full permute of two tables of SP elements overwriting the index vector.
VPERMI2PS
/// Full permute of two tables of qword elements overwriting the index vector.
VPERMI2Q
/// Full Permute From Two Tables Overwriting the Index.
VPERMI2W
/// Permute Double-Precision Floating-Point Values.
VPERMILPD
/// Permute Single-Precision Floating-Point Values.
VPERMILPS
/// Permute Double-Precision Floating-Point Elements.
VPERMPD
/// Permute Single-Precision Floating-Point Elements.
VPERMPS
/// Qwords Element Permutation.
VPERMQ
/// Full permute of two tables of byte elements overwriting one source table.
VPERMT2B
/// Full permute of two tables of dword elements overwriting one source table.
VPERMT2D
/// Full permute of two tables of DP elements overwriting one source table.
VPERMT2PD
/// Full permute of two tables of SP elements overwriting one source table.
VPERMT2PS
/// Full permute of two tables of qword elements overwriting one source table.
VPERMT2Q
/// Full permute of two tables of word elements overwriting one source table.
VPERMT2W
/// Permute packed word elements.
VPERMW
/// Load Sparse Packed Byte Integer Values from Dense Memory / Register.
VPEXPANDB
/// Load Sparse Packed Doubleword Integer Values from Dense Memory / Register.
VPEXPANDD
/// Load Sparse Packed Quadword Integer Values from Dense Memory / Register.
VPEXPANDQ
/// Load Sparse Packed Word Integer Values from Dense Memory / Register.
VPEXPANDW
/// Extract Byte.
VPEXTRB
/// Extract Dword.
VPEXTRD
/// Extract Qword.
VPEXTRQ
/// Extract Word.
VPEXTRW
/// Gather packed dword values using signed Dword/Qword indices.
VPGATHERDD
/// Gather Packed Qword Values Using Signed Dword/Qword Indices.
VPGATHERDQ
/// Gather Packed Dword Values Using Signed Dword/Qword Indices.
VPGATHERQD
/// Gather Packed Qword Values Using Signed Dword/Qword Indices.
VPGATHERQQ
/// Packed Horizontal Add (32-bit).
VPHADDD
/// Packed Horizontal Add and Saturate (16-bit).
VPHADDSW
/// Packed Horizontal Add (16-bit).
VPHADDW
/// Packed Horizontal Word Minimum.
VPHMINPOSUW
/// Packed Horizontal Subtract (32-bit).
VPHSUBD
/// Packed Horizontal Subtract and Saturate (16-bit).
VPHSUBSW
/// Packed Horizontal Subtract (16-bit).
VPHSUBW
/// Insert Byte.
VPINSRB
/// Insert Dword.
VPINSRD
/// Insert Qword.
VPINSRQ
/// Insert Word.
VPINSRW
/// Count the number of leading zero bits of packed dword elements.
VPLZCNTD
/// Count the number of leading zero bits of packed qword elements.
VPLZCNTQ
/// Packed Multiply of Unsigned 52-bit and Add High 52-bit Products.
VPMADD52HUQ
/// Packed Multiply of Unsigned 52-bit and Add Low 52-bit Products.
VPMADD52LUQ
/// Multiply and Add Packed Signed and Unsigned Bytes.
VPMADDUBSW
/// Multiply and Add Packed Integers.
VPMADDWD
/// Conditional SIMD Integer Packed Loads and Stores.
VPMASKMOVD
/// Conditional SIMD Integer Packed Loads and Stores.
VPMASKMOVQ
/// Maximum of Packed Signed Integers (byte).
VPMAXSB
/// Maximum of Packed Signed Integers (dword).
VPMAXSD
/// Compute maximum of packed signed 64-bit integer elements.
VPMAXSQ
/// Maximum of Packed Signed Word Integers.
VPMAXSW
/// Maximum of Packed Unsigned Byte Integers.
VPMAXUB
/// Maximum of Packed Unsigned Integers (dword).
VPMAXUD
/// Compute maximum of packed unsigned 64-bit integer elements.
VPMAXUQ
/// Maximum of Packed Unsigned Integers (word).
VPMAXUW
/// Minimum of Packed Signed Integers (byte).
VPMINSB
/// Minimum of Packed Signed Integers (dword).
VPMINSD
/// Compute minimum of packed signed 64-bit integer elements.
VPMINSQ
/// Minimum of Packed Signed Word Integers.
VPMINSW
/// Minimum of Packed Unsigned Byte Integers.
VPMINUB
/// Minimum of Packed Dword Integers.
VPMINUD
/// Compute minimum of packed unsigned 64-bit integer elements.
VPMINUQ
/// Minimum of Packed Unsigned Integers (word).
VPMINUW
/// Convert a vector register in 32/64-bit granularity to an opmask register.
VPMOVB2D
/// Convert a Vector Register to a Mask.
VPMOVB2M
/// Convert dword vector register to mask register.
VPMOVD2M
/// Down Convert DWord to Byte.
VPMOVDB
/// Down Convert DWord to Word.
VPMOVDW
/// Convert opmask register to vector register in 8-bit granularity.
VPMOVM2B
/// Convert opmask register to vector register in 32-bit granularity.
VPMOVM2D
/// Convert opmask register to vector register in 64-bit granularity.
VPMOVM2Q
/// Convert opmask register to vector register in 16-bit granularity.
VPMOVM2W
/// Move Byte Mask.
VPMOVMSKB
/// Convert qword vector register to mask register.
VPMOVQ2M
/// Down Convert QWord to Byte.
VPMOVQB
/// Down Convert QWord to DWord.
VPMOVQD
/// Down Convert QWord to Word.
VPMOVQW
/// Down Convert DWord to Byte.
VPMOVSDB
/// Down Convert DWord to Word.
VPMOVSDW
/// Down Convert QWord to Byte.
VPMOVSQB
/// Down Convert QWord to Dword.
VPMOVSQD
/// Down Convert QWord to Word.
VPMOVSQW
/// Down Convert Word to Byte.
VPMOVSWB
/// Packed Move with Sign Extend (8-bit to 32-bit).
VPMOVSXBD
/// Packed Move with Sign Extend (8-bit to 64-bit).
VPMOVSXBQ
/// Packed Move with Sign Extend (8-bit to 16-bit).
VPMOVSXBW
/// Packed Move with Sign Extend (32-bit to 64-bit).
VPMOVSXDQ
/// Packed Move with Sign Extend (16-bit to 32-bit).
VPMOVSXWD
/// Packed Move with Sign Extend (16-bit to 64-bit).
VPMOVSXWQ
/// Down Convert DWord to Byte.
VPMOVUSDB
/// Down Convert DWord to Word.
VPMOVUSDW
/// Down Convert QWord to Byte.
VPMOVUSQB
/// Down Convert QWord to DWord.
VPMOVUSQD
/// Down Convert QWord to Word.
VPMOVUSQW
/// Down Convert Word to Byte.
VPMOVUSWB
/// Convert a vector register in 16-bit granularity to an opmask register.
VPMOVW2M
/// Down convert word elements in a vector to byte elements using truncation.
VPMOVWB
/// Packed Move with Zero Extend (8-bit to 32-bit).
VPMOVZXBD
/// Packed Move with Zero Extend (8-bit to 64-bit).
VPMOVZXBQ
/// Packed Move with Zero Extend (8-bit to 16-bit).
VPMOVZXBW
/// Packed Move with Zero Extend (32-bit to 64-bit).
VPMOVZXDQ
/// Packed Move with Zero Extend (16-bit to 32-bit).
VPMOVZXWD
/// Packed Move with Zero Extend (16-bit to 64-bit).
VPMOVZXWQ
/// Multiply Packed Doubleword Integers.
VPMULDQ
/// Packed Multiply High with Round and Scale.
VPMULHRSW
/// Multiply Packed Unsigned Integers and Store High Result.
VPMULHUW
/// Multiply Packed Signed Integers and Store High Result.
VPMULHW
/// Multiply Packed Integers and Store Low Result.
VPMULLD
/// Multiply Packed Integers and Store Low Result.
VPMULLQ
/// Multiply Packed Signed Integers and Store Low Result.
VPMULLW
/// Select Packed Unaligned Bytes from Quadword Sources.
VPMULTISHIFTQB
/// Multiply Packed Unsigned Doubleword Integers.
VPMULUDQ
/// Return the Count of Number of Bits Set to 1 in byte.
VPOPCNTB
/// Return the Count of Number of Bits Set to 1 in dword.
VPOPCNTD
/// Return the Count of Number of Bits Set to 1 in qword.
VPOPCNTQ
/// Return the Count of Number of Bits Set to 1 in word.
VPOPCNTW
/// Bitwise Logical OR.
VPOR
/// Rotate dword elem left by a constant shift count with conditional update.
VPROLD
/// Rotate qword elem left by a constant shift count with conditional update.
VPROLQ
/// Rotate dword element left by shift counts specified.
VPROLVD
/// Rotate qword element left by shift counts specified.
VPROLVQ
/// Rotate dword element right by a constant shift count.
VPRORD
/// Rotate qword element right by a constant shift count.
VPRORQ
/// Rotate dword element right by shift counts specified.
VPRORRD
/// Rotate qword element right by shift counts specified.
VPRORRQ
/// Rotate dword element right by shift counts specified.
VPRORVD
/// Rotate qword element right by shift counts specified.
VPRORVQ
/// Compute Sum of Absolute Differences.
VPSADBW
/// Scatter dword elements in a vector to memory using dword indices.
VPSCATTERDD
/// Scatter qword elements in a vector to memory using dword indices.
VPSCATTERDQ
/// Scatter dword elements in a vector to memory using qword indices.
VPSCATTERQD
/// Scatter qword elements in a vector to memory using qword indices.
VPSCATTERQQ
/// Concatenate and Shift Packed Data Left Logical.
VPSHLDD
/// Concatenate and Shift Packed Data Left Logical.
VPSHLDQ
/// Concatenate and Variable Shift Packed Data Left Logical.
VPSHLDVD
/// Concatenate and Variable Shift Packed Data Left Logical.
VPSHLDVQ
/// Concatenate and Variable Shift Packed Data Left Logical.
VPSHLDVW
/// Concatenate and Shift Packed Data Left Logical.
VPSHLDW
/// Concatenate and Shift Packed Data Right Logical.
VPSHRDD
/// Concatenate and Shift Packed Data Right Logical.
VPSHRDQ
/// Concatenate and Variable Shift Packed Data Right Logical.
VPSHRDVD
/// Concatenate and Variable Shift Packed Data Right Logical.
VPSHRDVQ
/// Concatenate and Variable Shift Packed Data Right Logical.
VPSHRDVW
/// Concatenate and Shift Packed Data Right Logical.
VPSHRDW
/// Packed Shuffle Bytes.
VPSHUFB
/// Shuffle Bits from Quadword Elements Using Byte Indexes into Mask.
VPSHUFBITQMB
/// Shuffle Packed Doublewords.
VPSHUFD
/// Shuffle Packed High Words.
VPSHUFHW
/// Shuffle Packed Low Words.
VPSHUFLW
/// Packed SIGN (byte).
VPSIGNB
/// Packed SIGN (doubleword).
VPSIGND
/// Packed SIGN (word).
VPSIGNW
/// Shift Packed Data Left Logical (doubleword).
VPSLLD
/// Shift Double Quadword Left Logical.
VPSLLDQ
/// Shift Packed Data Left Logical (quadword).
VPSLLQ
/// Variable Bit Shift Left Logical.
VPSLLVD
/// Variable Bit Shift Left Logical.
VPSLLVQ
/// Variable Bit Shift Left Logical.
VPSLLVW
/// Shift Packed Data Left Logical (word).
VPSLLW
/// Shift Packed Data Right Arithmetic (doubleword).
VPSRAD
/// Shift qwords right by a constant shift count and shifting in sign bits.
VPSRAQ
/// Variable Bit Shift Right Arithmetic.
VPSRAVD
/// Shift qwords right by shift counts in a vector and shifting in sign bits.
VPSRAVQ
/// Variable Bit Shift Right Arithmetic.
VPSRAVW
/// Shift Packed Data Right Arithmetic (word).
VPSRAW
/// Shift Packed Data Right Logical (doubleword).
VPSRLD
/// Shift Double Quadword Right Logical.
VPSRLDQ
/// Shift Packed Data Right Logical (quadword).
VPSRLQ
/// Variable Bit Shift Right Logical.
VPSRLVD
/// Variable Bit Shift Right Logical.
VPSRLVQ
/// Variable Bit Shift Right Logical.
VPSRLVW
/// Shift Packed Data Right Logical (word).
VPSRLW
/// Subtract Packed Integers (byte).
VPSUBB
/// Subtract Packed Integers (doubleword).
VPSUBD
/// Subtract Packed Integers (quadword).
VPSUBQ
/// Subtract Packed Signed Integers with Signed Saturation (byte).
VPSUBSB
/// Subtract Packed Signed Integers with Signed Saturation (word).
VPSUBSW
/// Subtract Packed Unsigned Integers with Unsigned Saturation (byte).
VPSUBUSB
/// Subtract Packed Unsigned Integers with Unsigned Saturation (word).
VPSUBUSW
/// Subtract Packed Integers (word).
VPSUBW
/// Perform bitwise ternary logic operation of three vectors.
VPTERLOGD
/// Perform bitwise ternary logic operation of three vectors.
VPTERLOGQ
/// Bitwise Ternary Logic.
VPTERNLOGD
/// Bitwise Ternary Logic.
VPTERNLOGQ
/// Logical Compare.
VPTEST
/// Perform bitwise AND of byte elems of two vecs and write results to opmask.
VPTESTMB
/// Perform bitwise AND of dword elems of 2-vecs and write results to opmask.
VPTESTMD
/// Perform bitwise AND of qword elems of 2-vecs and write results to opmask.
VPTESTMQ
/// Perform bitwise AND of word elems of two vecs and write results to opmask.
VPTESTMW
/// Perform bitwise NAND of byte elems of 2-vecs and write results to opmask.
VPTESTNMB
/// Perform bitwise NAND of dword elems of 2-vecs and write results to opmask.
VPTESTNMD
/// Perform bitwise NAND of qword elems of 2-vecs and write results to opmask.
VPTESTNMQ
/// Perform bitwise NAND of word elems of 2-vecs and write results to opmask.
VPTESTNMW
/// Unpack High Data.
VPUNPCKHBW
/// Unpack High Data.
VPUNPCKHDQ
/// Unpack High Data.
VPUNPCKHQDQ
/// Unpack High Data.
VPUNPCKHWD
/// Unpack Low Data.
VPUNPCKLBW
/// Unpack Low Data.
VPUNPCKLDQ
/// Unpack Low Data.
VPUNPCKLQDQ
/// Unpack Low Data.
VPUNPCKLWD
/// Logical Exclusive OR.
VPXOR
/// Bitwise XOR of packed doubleword integers.
VPXORD
/// Bitwise XOR of packed quadword integers.
VPXORQ
/// Range Restriction Calculation For Packed Pairs of Float64 Values.
VRANGEPD
/// Range Restriction Calculation For Packed Pairs of Float32 Values.
VRANGEPS
/// Range Restriction Calculation From a pair of Scalar Float64 Values.
VRANGESD
/// Range Restriction Calculation From a Pair of Scalar Float32 Values.
VRANGESS
/// Compute Approximate Reciprocals of Packed Float64 Values.
VRCP14PD
/// Compute Approximate Reciprocals of Packed Float32 Values.
VRCP14PS
/// Compute Approximate Reciprocal of Scalar Float64 Value.
VRCP14SD
/// Compute Approximate Reciprocal of Scalar Float32 Value.
VRCP14SS
/// Computes the reciprocal approximation of the float64 values.
VRCP28PD
/// Computes the reciprocal approximation of the float32 values.
VRCP28PS
/// Computes the reciprocal approximation of the low float64 value.
VRCP28SD
/// Computes the reciprocal approximation of the low float32 value.
VRCP28SS
/// Compute reciprocals of packed single-precision floating-point values.
VRCPPS
/// Compute Reciprocal of Scalar Single-Precision Floating-Point Values.
VRCPSS
/// Perform Reduction Transformation on Packed Float64 Values.
VREDUCEPD
/// Perform Reduction Transformation on Packed Float32 Values.
VREDUCEPS
/// Perform a Reduction Transformation on a Scalar Float64 Value.
VREDUCESD
/// Perform a Reduction Transformation on a Scalar Float32 Value.
VREDUCESS
/// Round Packed Float64 Values To Include A Given Number Of Fraction Bits.
VRNDSCALEPD
/// Round Packed Float32 Values To Include A Given Number Of Fraction Bits.
VRNDSCALEPS
/// Round Scalar Float64 Value To Include A Given Number Of Fraction Bits.
VRNDSCALESD
/// Round Scalar Float32 Value To Include A Given Number Of Fraction Bits.
VRNDSCALESS
/// Round Packed Double-Precision Values.
VROUNDPD
/// Round Packed Single-Precision Values.
VROUNDPS
/// Round Scalar Double-Precision Value.
VROUNDSD
/// Round Scalar Single-Precision Value.
VROUNDSS
/// Compute Approximate Reciprocals of Square Roots of Packed Float64 Values.
VRSQRT14PD
/// Compute Approximate Reciprocals of Square Roots of Packed Float32 Values.
VRSQRT14PS
/// Compute Approximate Reciprocal of Square Root of Scalar Float64 Value.
VRSQRT14SD
/// Compute Approximate Reciprocal of Square Root of Scalar Float32 Value.
VRSQRT14SS
/// Computes the reciprocal square root of the float64 values.
VRSQRT28PD
/// Computes the reciprocal square root of the float32 values.
VRSQRT28PS
/// Computes the reciprocal square root of the low float64 value.
VRSQRT28SD
/// Computes the reciprocal square root of the low float32 value.
VRSQRT28SS
/// Compute Reciprocals of Square Roots of Packed Single-Precision FP Values.
VRSQRTPS
/// Compute Reciprocal of Square Root of Scalar Single-Precision FP Value.
VRSQRTSS
/// Scale Packed Float64 Values With Float64 Values.
VSCALEFPD
/// Scale Packed Float32 Values With Float32 Values.
VSCALEFPS
/// Scale Scalar Float64 Values With Float64 Values.
VSCALEFSD
/// Scale Scalar Float32 Value With Float32 Value.
VSCALEFSS
/// Multiply packed DP FP elements of a vector by powers.
VSCALEPD
/// Multiply packed SP FP elements of a vector by powers.
VSCALEPS
/// Multiply the low DP FP element of a vector by powers.
VSCALESD
/// Multiply the low SP FP element of a vector by powers.
VSCALESS
/// Scatter SP/DP FP elements in a vector to memory using dword indices.
VSCATTERDD
/// Scatter packed double with signed dword indices.
VSCATTERDPD
/// Scatter packed single with signed dword indices.
VSCATTERDPS
/// Scatter SP/DP FP elements in a vector to memory using dword indices.
VSCATTERDQ
/// Sparse prefetch packed DP FP with T0 hint to write using dword indices.
VSCATTERPF0DPD
/// Sparse prefetch packed SP FP with T0 hint to write using dword indices.
VSCATTERPF0DPS
/// Sparse prefetch packed DP FP with T0 hint to write using qword indices.
VSCATTERPF0QPD
/// Sparse prefetch packed SP FP with T0 hint to write using qword indices.
VSCATTERPF0QPS
/// Sparse prefetch packed DP FP with T1 hint to write using dword indices.
VSCATTERPF1DPD
/// Sparse prefetch packed SP FP with T1 hint to write using dword indices.
VSCATTERPF1DPS
/// Sparse prefetch packed DP FP with T1 hint to write using qword indices.
VSCATTERPF1QPD
/// Sparse prefetch packed SP FP with T1 hint to write using qword indices.
VSCATTERPF1QPS
/// Scatter SP/DP FP elements in a vector to memory using qword indices.
VSCATTERQD
/// Scatter packed double with signed qword indices.
VSCATTERQPD
/// Scatter packed single with signed qword indices.
VSCATTERQPS
/// Scatter SP/DP FP elements in a vector to memory using qword indices.
VSCATTERQQ
/// Shuffle 128-bit lanes of a vector with 32 bit granular conditional update.
VSHUFF32X4
/// Shuffle 128-bit lanes of a vector with 64 bit granular conditional update.
VSHUFF64X2
/// Shuffle 128-bit lanes of a vector with 32 bit granular conditional update.
VSHUFI32X4
/// Shuffle 128-bit lanes of a vector with 64 bit granular conditional update.
VSHUFI64X2
/// Shuffle Packed Double-Precision Floating-Point Values.
VSHUFPD
/// Shuffle Packed Single-Precision Floating-Point Values.
VSHUFPS
/// Compute packed square roots of packed double-precision FP values.
VSQRTPD
/// Compute square roots of packed single-precision floating-point values.
VSQRTPS
/// Compute scalar square root of scalar double-precision FP values.
VSQRTSD
/// Compute square root of scalar single-precision floating-point values.
VSQRTSS
/// Subtract Packed Double-Precision Floating-Point Values.
VSUBPD
/// Subtract Packed Single-Precision Floating-Point Values.
VSUBPS
/// Subtract Scalar Double-Precision Floating-Point Values.
VSUBSD
/// Subtract Scalar Single-Precision Floating-Point Values.
VSUBSS
/// Packed Bit Test.
VTESTPD
/// Packed Bit Test.
VTESTPS
/// Unordered Compare Scalar Double-Precision FP Values and Set EFLAGS.
VUCOMISD
/// Unordered Compare Scalar Single-Precision FPValues and Set EFLAGS.
VUCOMISS
/// Unpack and Interleave High Packed Double-Precision Floating-Point Values.
VUNPCKHPD
/// Unpack and Interleave High Packed Single-Precision Floating-Point Values.
VUNPCKHPS
/// Unpack and Interleave Low Packed Double-Precision Floating-Point Values.
VUNPCKLPD
/// Unpack and Interleave Low Packed Single-Precision Floating-Point Values.
VUNPCKLPS
/// Bitwise Logical XOR for Double-Precision Floating-Point Values.
VXORPD
/// Bitwise Logical XOR for Single-Precision Floating-Point Values.
VXORPS
/// Zero Upper Bits of YMM Registers.
VZEROUPPER
/// Wait.
WAIT
/// Write Back and Invalidate Cache.
WBINVD
/// Write FS Segment Base.
WRFSBASE
/// Write GS Segment Base.
WRGSBASE
/// Write to Model Specific Register.
WRMSR
/// Write Data to User Page Key Register.
WRPKRU
/// Write to a shadow stack.
WRSSD
/// Write to a shadow stack.
WRSSQ
/// Write to a user mode shadow stack.
WRUSSD
/// Write to a user mode shadow stack.
WRUSSQ
/// Transactional Abort.
XABORT
/// Prefix hint to the beginning of an HLE transaction region.
XACQUIRE
/// Exchange and Add.
XADD
/// Transactional Begin.
XBEGIN
/// Exchange Register/Memory with Register.
XCHG
/// Transactional End.
XEND
/// Value of Extended Control Register.
XGETBV
/// Table lookup translation.
XLAT
/// Table Look-up Translation.
XLATB
/// Logical Exclusive OR.
XOR
/// Bitwise Logical XOR for Double-Precision Floating-Point Values.
XORPD
/// Bitwise Logical XOR for Single-Precision Floating-Point Values.
XORPS
/// Prefix hint to the end of an HLE transaction region.
XRELEASE
/// Restore Processor Extended States.
XRSTOR
/// Restore processor supervisor-mode extended states from memory.
XRSTORS
/// Restore processor supervisor-mode extended states from memory.
XRSTORS64
/// Save Processor Extended States.
XSAVE
/// Save processor extended states with compaction to memory.
XSAVEC
/// Save processor extended states with compaction to memory.
XSAVEC64
/// Save Processor Extended States Optimized.
XSAVEOPT
/// Save processor supervisor-mode extended states to memory.
XSAVES
/// Save processor supervisor-mode extended states to memory.
XSAVES64
/// Set Extended Control Register.
XSETBV
/// Test If In Transactional Execution.
XTEST
/// Invalid Opcode.
InvalOP
